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NCP1200
PWM Current-Mode
Controller for Low-Power
Universal Off-Line Supplies
Housed in SOIC-8 or PDIP-8 package, the NCP1200 represents a
major leap toward ultra-compact Switchmode Power Supplies. Due to
a novel concept, the circuit allows the implementation of a complete
offline battery charger or a standby SMPS with few external
components. Furthermore, an integrated output short- circuit
protection lets the designer build an extremely low-cost AC-DC wall
adapter associated with a simplified feedback scheme.
With an internal structure operating at a fixed 40 kHz, 60 kHz or
100 kHz, the controller drives low gate-charge switching devices like
an IGBT or a MOSFET thus requiring a very small operating power.
Due to current-mode control, the NCP1200 drastically simplifies the
design of reliable and cheap offline converters with extremely low
acoustic generation and inherent pulse-by-pulse control.
When the current setpoint falls below a given value, e.g. the output
power demand diminishes, the IC automatically enters the skip cycle
mode and provides excellent efficiency at light loads. Because this
occurs at low peak current, no acoustic noise takes place.
Finally, the IC is self-supplied from the DC rail, eliminating the
need of an auxiliary winding. This feature ensures operation in
presence of low output voltage or shorts.
Features
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MARKING
DIAGRAMS
8
SOIC-8
D SUFFIX
CASE 751
1
1
8
PDIP-8
P SUFFIX
CASE 626
8
1
xxx
y
1
= Device Code: 40, 60 or 100
= Device Code:
4 for 40
6 for 60
1 for 100
A
= Assembly Location
L
= Wafer Lot
Y, YY = Year
W, WW = Work Week
G,
G
= Pb-Free Package
1200Pxxx
AWL
YYWWG
200Dy
ALYW
G
8
•
•
•
•
•
•
•
•
•
•
•
•
No Auxiliary Winding Operation
Internal Output Short-Circuit Protection
Extremely Low No-Load Standby Power
Current-Mode with Skip-Cycle Capability
Internal Leading Edge Blanking
250 mA Peak Current Source/Sink Capability
Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz
Direct Optocoupler Connection
Built-in Frequency Jittering for Lower EMI
SPICE Models Available for TRANsient and AC Analysis
Internal Temperature Shutdown
Pb-Free Packages are Available
PIN CONNECTIONS
Adj
FB
CS
GND
1
2
3
4
8
7
6
5
HV
NC
V
CC
Drv
(Top View)
Typical Applications
•
AC-DC Adapters
•
Offline Battery Chargers
•
Auxiliary/Ancillary Power Supplies (USB, Appliances, TVs, etc.)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
©
Semiconductor Components Industries, LLC, 2007
1
May, 2007 - Rev. 16
Publication Order Number:
NCP1200/D
NCP1200
*
1
Adj
2 FB
3 CS
EMI
Filter
+
C5
10
mF
Universal Input
R
sense
D8
5 V1
HV 8
NC 7
V
CC
6
M1
MTD1N60E
D2
1N5819
6.5 V @ 600 mA
+ C2
470
mF/10
V
Rf
470
C3
10
mF
400 V
+
4 GND Drv 5
*Please refer to the application information section
Figure 1. Typical Application
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PIN FUNCTION DESCRIPTION
Pin No.
1
2
3
4
5
6
7
8
Pin Name
Adj
FB
Function
Description
Adjust the Skipping Peak Current
Sets the Peak Current Setpoint
Current Sense Input
The IC Ground
Driving Pulses
This pin lets you adjust the level at which the cycle skipping process takes
place.
By connecting an Optocoupler to this pin, the peak current setpoint is
adjusted accordingly to the output power demand.
CS
This pin senses the primary current and routes it to the internal comparator
via an L.E.B.
GND
Drv
The driver's output to an external MOSFET.
V
CC
NC
HV
Supplies the IC
No Connection
This pin is connected to an external bulk capacitor of typically 10
mF.
This un-connected pin ensures adequate creepage distance.
Generates the V
CC
from the Line
Connected to the high-voltage rail, this pin injects a constant current into
the V
CC
bulk capacitor.
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2
NCP1200
Adj
1
HV Current
Source
75.5 k
1.4 V
Skip Cycle
Comparator
Internal
V
CC
UVLO
High and Low
Internal Regulator
8
HV
+
-
FB
2
29 k
7
NC
Current
Sense
3
250 ns
L.E.B.
40, 60 or
100 kHz
Clock
Set
Q Flip-Flop
DCmax = 80%
Reset
Q
6
V
CC
Ground
4
+
-
8k
V
ref
5.2 V
60 k
1V
+
-
±250
mA
Overload?
Fault Duration
5
Drv
20 k
Figure 2. Internal Circuit Architecture
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MAXIMUM RATINGS
Rating
Symbol
V
CC
Value
16
Units
V
Power Supply Voltage
Thermal Resistance Junction-to-Air, PDIP-8 version
Thermal Resistance Junction-to-Air, SOIC version
Thermal Resistance Junction-to-Case
Maximum Junction Temperature
Typical Temperature Shutdown
Storage Temperature Range
R
qJA
R
qJA
R
qJC
100
178
57
150
140
°C/W
T
Jmax
-
°C
°C
T
stg
-
-
-
-
-
-60 to +150
2.0
ESD Capability, HBM Model (All Pins except V
CC
and HV)
ESD Capability, Machine Model
kV
V
V
V
V
200
450
500
30
Maximum Voltage on Pin 8 (HV), pin 6 (V
CC
) Grounded
Maximum Voltage on Pin 8 (HV), Pin 6 (V
CC
) Decoupled to Ground with 10
mF
Minimum Operating Voltage on Pin 8 (HV)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
NCP1200
ELECTRICAL CHARACTERISTICS
(For typical values T
J
= +25°C, for min/max values T
J
= -25°C to +125°C, Max T
J
= 150°C,
V
CC
= 11 V unless otherwise noted)
Rating
DYNAMIC SELF-SUPPLY
(All Frequency Versions, Otherwise Noted)
V
CC
Increasing Level at Which the Current Source Turns-of f
V
CC
Decreasing Level at Which the Current Source Turns- on
V
CC
Decreasing Level at Which the Latchoff Phase Ends
Internal IC Consumption, No Output Load on Pin 5
Internal IC Consumption, 1 nF Output Load on Pin 5, F
SW
= 40 kHz
Internal IC Consumption, 1 nF Output Load on Pin 5, F
SW
= 60 kHz
Internal IC Consumption, 1 nF Output Load on Pin 5, F
SW
= 100 kHz
Internal IC Consumption, Latchoff Phase
INTERNAL CURRENT SOURCE
High-voltage Current Source, V
CC
= 10 V
High-voltage Current Source, V
CC
= 0 V
DRIVE OUTPUT
Output Voltage Rise-time @ CL = 1 nF, 10-90% of Output Signal
Output Voltage Fall-time @ CL = 1 nF, 10-90% of Output Signal
Source Resistance (drive = 0, Vgate = V
CCHMAX
- 1 V)
Sink Resistance (drive = 11 V, Vgate = 1 V)
CURRENT COMPARATOR
(Pin 5 Un-loaded)
Input Bias Current @ 1 V Input Level on Pin 3
Maximum internal Current Setpoint
Default Internal Current Setpoint for Skip Cycle Operation
Propagation Delay from Current Detection to Gate OFF State
Leading Edge Blanking Duration
INTERNAL OSCILLATOR
(V
CC
= 11 V, Pin 5 Loaded by 1 kW)
Oscillation Frequency, 40 kHz Version
Oscillation Frequency, 60 kHz Version
Oscillation Frequency, 100 kHz Version
Built-in Frequency Jittering, F
SW
= 40 kHz
Built-in Frequency Jittering, F
SW
= 60 kHz
Built-in Frequency Jittering, F
SW
= 100 kHz
Maximum Duty Cycle
FEEDBACK SECTION
(V
CC
= 11 V, Pin 5 Loaded by 1 kW)
Internal Pullup Resistor
Pin 3 to Current Setpoint Division Ratio
SKIP CYCLE GENERATION
Default skip mode level
Pin 1 internal output impedance
1. Max value @ T
J
= -25°C.
2. Max value @ T
J
= 25°C, please see characterization curves.
1
1
Vskip
Zout
1.1
-
1.4
25
1.6
-
V
kW
2
-
Rup
Iratio
-
-
8.0
4.0
-
-
kW
-
-
-
-
-
-
-
-
f
OSC
f
OSC
f
OSC
f
jitter
f
jitter
f
jitter
Dmax
36
52
86
-
-
-
74
42
61
103
300
450
620
80
48
70
116
-
-
-
87
kHz
kHz
kHz
Hz/V
Hz/V
Hz/V
%
3
3
3
3
3
I
IB
I
Limit
I
Lskip
T
DEL
T
LEB
-
0.8
-
-
-
0.02
0.9
350
100
230
-
1.0
-
160
-
mA
V
mV
ns
ns
5
5
5
5
T
r
T
f
R
OH
R
OL
-
-
27
5
67
28
40
12
-
-
61
25
ns
ns
W
W
8
8
I
C1
I
C2
2.8
-
4.0
4.9
-
-
mA
mA
6
6
6
6
6
6
6
6
V
CCOFF
V
CCON
V
CClatch
I
CC1
I
CC2
I
CC2
I
CC2
I
CC3
10.3
8.8
-
-
-
-
-
-
11.4
9.8
6.3
710
1.2
1.4
1.9
350
12.5
11
-
880
Note 1
1.4
Note 2
1.6
Note 2
2.2
Note 2
-
V
V
V
mA
mA
mA
mA
mA
Pin
Symbol
Min
Typ
Max
Unit
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4
FPGA/CPLD
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