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TSCR8051L3PS-18

Description
Microcontroller
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size1MB,59 Pages
ManufacturerTezzaron Semiconductor Corp.
Environmental Compliance
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TSCR8051L3PS-18 Overview

Microcontroller

TSCR8051L3PS-18 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instruction,
Reach Compliance Codeunknown
Base Number Matches1
Advance Data
TSCR8051L2 / TSCR8051L3 / TSCR8051L5
FaStack™ 8051 RISC Micro-Controller
1.
Description
High-Speed, 8051-Compatible,
With SRAM and Extended Functions
Tezzaron Semiconductor’s TSCR8051Lx micro-controllers feature layers of stacked integrated memory. These 8-bit
®
micro-controllers are software compatible with the millions of devices that have been produced since Intel introduced the
8051 line in 1980. The TSCR8051Lx executes all ASM51 instructions and uses the same instruction set as the 8031.
The TSCR8051Lx uses a Reduced Instruction Set Computer (RISC) core so that many of its instructions are executed in
a single clock cycle. This provides a significant speed advantage over traditional 8051 devices that execute an instruction
every twelve clock cycles. With clock speeds of up to 200 MHz, the Tezzaron devices are 8051 performance leaders.
The TSCR8051Lx uses Tezzaron’s patented FaStack wafer stacking technology to bond one or more layers of high-
speed SRAM over the processor, providing additional Data and Program memory. In the TSCR8051L2, a single SRAM
layer provides 128KBytes of partitionable Data and Program memory; in the TSCR8051L3, there are two layers of SRAM
(256KBytes); in the TSCR8051L5, four layers (512KBytes).
The TSCR8051Lx features extended 32-bit capabilities including an IEEE 754-compliant floating-point coprocessor with
comparator, a multiply/divide unit, a population counter, and a leading-zero counter.
2.
Features
3.
ƒ
Industry standard 8051 / 8031 software compatible
ƒ
RISC architecture with up to x12 speed advantage / MHz
over traditional 8051 family devices
ƒ
Four speed grades: 100, 150, 180, and 200 MHz
ƒ
128, 256, or 512KB of additional high-speed FaStack
SRAM memory
ƒ
IEEE 754-compliant floating point coprocessor for full
arithmetic capabilities – up to 100 MFlops
ƒ
Extended 32-bit computing functions including population
counter, leading zero counter, and floating-point
comparator
ƒ
Dual data pointers for fast data block moves
ƒ
Full 8051-compatible architecture including:
o
Four 8-bit bi-directional ports
o
256 Bytes of “Scratch Pad” memory
o
Three 16-bit timer/counters
o
Interrupt controller with 12 interrupt sources and 4
priority levels
o
15-bit programmable watchdog timer
o
Core 8-bit arithmetic logic unit and 16-bit
multiplication division unit
o
Two full-duplex serial ports
o
Four capture/compare units to generate pulse width
modulated signals
o
Special Function Register (SFR) interface, serving
up to 50 SFR devices
Part Numbering
Options
Marking
L2
L3
L5
P
B
S
E
-06
-10
-15
-18
-20
ƒ
FaStack SRAM:
128KB
256KB
512KB
ƒ
Packages:
132 PGA
128 BGA
ƒ
Operating Temperature:
Standard, 0º to 70º C
Extended (planned)
ƒ
Speed Grade:
66 MHz
100 MHz
150 MHz
180 MHz
200 MHz
Part number example:
TSCR8051L2PS-06
4.
Operating Voltages
V
DDQ,
V
DDQF
= 3.3 ± .3 VDC
V
DD
= 1.8 ± .2 VDC
Rev. 1.5 – December 7, 2004
Page 1 of 59
© Tezzaron Semiconductor Corporation

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Is it Rohs certified? conform to conform to
Reach Compliance Code unknown unknown
Base Number Matches 1 1
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