DPS92256N-150M datasheet, PDF - EEWORLD Datasheet

DPS92256N-150M: DescriptionStandard SRAM, 32KX8, 150ns, CMOS, CDIP28, SIDE BRAZED, DIP-28; Categorystorage storage; File Size192KB，6 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPS92256N-150M Overview

Standard SRAM, 32KX8, 150ns, CMOS, CDIP28, SIDE BRAZED, DIP-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP, DIP28,.6
Contacts	28
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	150 ns
I/O type	COMMON
JESD-30 code	R-CDIP-T28
JESD-609 code	e0
length	35.56 mm
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	32KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.191 mm
Maximum standby current	0.0002 A
Minimum standby current	2 V
Maximum slew rate	0.07 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm
Base Number Matches	1

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