EPA572-10A datasheet, PDF - EEWORLD Datasheet

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EPA572-10A: Description7 Pin Single-in-Line Package Passive Delay Lines; Categorylogic logic; File Size9KB，1 Pages; ManufacturerPCA Electronics Inc.; Websitehttp://www.pca.com/

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EPA572-10A Overview

7 Pin Single-in-Line Package Passive Delay Lines

EPA572-10A Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	PCA Electronics Inc.
Parts packaging code	SIP
package instruction	SIP-7
Contacts	7
Reach Compliance Code	compli
Other features	MAX RISE TIME CAPTURED
Input frequency maximum value (fmax)	20 MHz
JESD-30 code	R-XSIP-T7
JESD-609 code	e0
Logic integrated circuit type	PASSIVE DELAY LINE
Humidity sensitivity level	3
Number of functions	1
Number of taps/steps	5
Number of terminals	7
Maximum operating temperature	70 °C
Minimum operating temperature
Output impedance nominal value (Z0)	50 Ω
Output polarity	TRUE
Package body material	UNSPECIFIED
encapsulated code	SIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	6.35 mm
surface mount	NO
technology	HYBRID
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	10 ns

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7 Pin Single-in-Line Package Passive Delay Lines

OHMS

±10%

DELAY

nS ±5%

±2 nS†

100

TAP

DELAYS

±5% or

±2 nS†

RISE

TIME

Max.

DCR

OHMS

Max.

PCA

PART

NUMBER

DELAY

OHMS nS ±5%

±10%

±2 nS †

100

TAP

DELAYS

±5% or

±2 nS†

RISE

TIME

Max.

3.3

DCR

OHMS

Max.

PCA

PART

NUMBER

0.3

0.5

0.8

1.2

1.8

2.3

2.5

3.5

4.2

4.5

5.2

EPA572-5A

EPA572-10A

EPA572-20A

EPA572-30A

EPA572-40A

EPA572-50A

EPA572-60A

EPA572-70A

EPA572-80A

EPA572-90A

EPA572-100A

0.5

1.0

1.5

2.5

4.0

5.0

5.5

6.0

6.5

7.0

7.5

EPA572-5B

EPA572-10B

EPA572-20B

EPA572-30B

EPA572-40B

EPA572-50B

EPA572-60B

EPA572-70B

EPA572-80B

EPA572-90B

EPA572-100B

†Whichever

is greater.

DC Electrical Characteristics

Distortion

Temperature Coefficient of Delay

Insulation Resistance @ 100 Vdc

Dielectric Strength

Min

Max

±10

100

Unit

PPM/°C

Meg Ohms

Vdc

Schematic

OUT

100

GROUND

Recommended Operating

Conditions

PW*

Pulse Width % of Total Delay

Duty Cycle

Operating Free Air Temperature

Package Dimensions

Min

200

Max

Unit

°C

.250 Max.

.195

Max

.022

Min.

.130 Min.

.022

Typ.

.800 Max.

PCA

EPA572-5A

Date Code

*These two values are inter-dependent.

.010

Typ.

.100 Typ.

Input Pulse Test Conditions @ 25°C

VIN

TRI

PRR

Pulse Input Voltage

Pulse Width % of Total Delay

Input Rise Time (10 - 90%)

Pulse Repetition Rate @ Td

≤

150 nS

Pulse Repetition Rate @ Td > 150 nS

3 Volts

300 %

2.0 nS

1.0 MHz

300 KHz

DSA572A/B Rev. B 2/5/96

QAF-CSO1 Rev. B 8/25/94

Unless Otherwise Noted Dimensions in Inches

Tolerances:

Fractional = ± 1/32

.XX = ± .030

.XXX = ± .010

ELECTRONICS

INC.

16799 SCHOENBORN ST.

NORTH HILLS, CA 91343

TEL: (818) 892-0761

FAX: (818) 894-5791

EPA572-10A Related Products

	EPA572-10A	EPA572-20A	EPA572-5A	EPA572-30A
Description	7 Pin Single-in-Line Package Passive Delay Lines	7 Pin Single-in-Line Package Passive Delay Lines	7 Pin Single-in-Line Package Passive Delay Lines	7 Pin Single-in-Line Package Passive Delay Lines
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	PCA Electronics Inc.	PCA Electronics Inc.	PCA Electronics Inc.	PCA Electronics Inc.
Parts packaging code	SIP	SIP	SIP	SIP
package instruction	SIP-7	SIP-7	SIP-7	SIP-7
Contacts	7	7	7	7
Reach Compliance Code	compli	compliant	compli	compli
Other features	MAX RISE TIME CAPTURED	MAX RISE TIME CAPTURED	MAX RISE TIME CAPTURED	MAX RISE TIME CAPTURED
Input frequency maximum value (fmax)	20 MHz	10 MHz	40 MHz	6.66667 MHz
JESD-30 code	R-XSIP-T7	R-XSIP-T7	R-XSIP-T7	R-XSIP-T7
JESD-609 code	e0	e0	e0	e0
Logic integrated circuit type	PASSIVE DELAY LINE	PASSIVE DELAY LINE	PASSIVE DELAY LINE	PASSIVE DELAY LINE
Humidity sensitivity level	3	3	3	3
Number of functions	1	1	1	1
Number of taps/steps	5	5	5	5
Number of terminals	7	7	7	7
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
Output impedance nominal value (Z0)	50 Ω	50 Ω	50 Ω	50 Ω
Output polarity	TRUE	TRUE	TRUE	TRUE
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
encapsulated code	SIP	SIP	SIP	SIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
programmable delay line	NO	NO	NO	NO
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	6.35 mm	6.35 mm	6.35 mm	6.35 mm
surface mount	NO	NO	NO	NO
technology	HYBRID	HYBRID	HYBRID	HYBRID
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm	2.54 mm	2.54 mm
Terminal location	SINGLE	SINGLE	SINGLE	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Total delay nominal (td)	10 ns	20 ns	5 ns	30 ns

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