The 3650 and 3652 are optically coupled integrated
circuit isolation amplifiers. Prior to their introduction
commercially available isolation amplifiers had been
modular or rack mounted devices using transformer
coupled modulation demodulation techniques.
Compared to these earlier isolation amplifiers, the
3650 and 3652 have the advantage of smaller size,
6
4
1.6MΩ
8
R
G1
lower cost, wider bandwidth and integrated circuit
reliability. Also, because they use a DC analog modu-
lation technique as opposed to a carrier-type tech-
nique, they avoid the problems of electro-
magnetic interference (both transmitted and received)
that most of the modular isolation amplifiers exhibit.
A
1
11
R
IN
R
G2
A
3
Light
Flux
Coupling
A
4
23
3
1
1.6MΩ
A
1
9
10
3652 Only
Common to 3650 and 3652
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
NOTES: (1) All electrical and mechanical specifications of the 3650MG and 3652MG are identical to the 3650HG and 3652HG, respectively, except that the following
specifications apply to the 3650MG and 3652MG: (a) Isolation test voltage duration increased from 10 seconds minimum to 60 seconds minimum; (b) Input offset voltage
at 25°C, max:
±10mV;
vs temperature max:
±100µV/°C;
(c) Output offset voltage at 25°C, max;
±50mV;
vs temperature max;
±1.8mV/°C.
(2) If used as 3650, see
Installation and Operating Instructions. (3) Trimmable to zero. (4) Gain error terms specified for inputs applied through buffer amplifiers (i.e.,
±1
or
±I
R
pins). (5) Input
stage specifications at +I and –I inputs for 3652 unless otherwise noted. (6) Maximum safe input current at either input is 10mA. (7) Continuous rating is 1/3 pulse rating.
(8) Load current is drawn from one supply lead at a time: other supply current at quiescent level. For 3652 add 0.2mA/V of positive CMV. (9) dT/dt
<
1°C/minute below
0°C, and long-term storage above 100°C is not recommended. Also limit the repeated thermal cycles to be within the 0°C to +85°C temperature range.
PIN CONFIGURATIONS
13
14
PACKAGE INFORMATION
3650
PRODUCT
26
PACKAGE
32-Pin DIP
32-Pin DIP
PACKAGE DRAWING
NUMBER
(1)
77
77
–V
11
+
+V
+V
CC
–V
CC
10
12
C
–
C
Bal
Bal
3650
3652
20
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
23
17
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
15
16
32
29
8
6
4
1.6MΩ
R
O
2
A
1
Gain Adj
11
13
14
3652
–V
+
+V
+V
CC
–V
CC
C
Gain Adj
R
O
2
A
2
–
C
Bal
Bal
26
20
23
17
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
3
1
1.6MΩ
9
10 12
15
16
32
29
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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FPGA/CPLD
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