Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9S08SE8
Rev. 2, 1/2009
MC9S08SE8
TBD
MC9S08SE8 Series
Covers:
Features:
• 8-Bit HCS08 Central Processor Unit (CPU)
– 20 MHz HCS08 CPU (central processor unit)
– 10 MHz internal bus frequency
– HC08 instruction set with added BGND
– Support for up to 32 interrupt/reset sources
• On-Chip Memory
– Up to 8 KB of on-chip in-circuit programmable flash
memory with block protection and security options
– Up to 512 bytes of on-chip RAM
• Power-Saving Modes
– Wait plus two stops
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
38.4 kHz or 1 MHz to 16 MHz
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supports bus frequencies from 1 MHz to 10 MHz.
• System Protection
– Optional computer operating properly (COP) reset with
option to run from independent 1 kHz internal clock
source or the bus clock
– Low voltage detection
– Illegal opcode detection with reset
– Illegal address detection with reset
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
• Peripherals
28-Pin SOIC
Case 751F
16-Pin TSSOP
Case 948F-01
MC9S08SE8
MC9S08SE4
28 PDIP
Case 710-02
–
SCI
— Full duplex non-return to zero (NRZ); LIN
master extended break generation; LIN slave extended
break detection; wakeup on active edge
–
ADC —
10-channel, 10-bit resolution; 2.5
μs
conversion time; automatic compare function;
1.7 mV/°C temperature sensor; internal bandgap
reference channel; runs in stop3
–
TPMx
— One 2-channel (TPM1) and one 1-channel
(TPM2) 16-bit timer/pulse-width modulator (TPM)
modules; selectable input capture, output compare, and
edge-aligned PWM capability on each channel; timer
module may be configured for buffered, centered PWM
(CPWM) on all channels
–
KBI
— 8-pin keyboard interrupt module
–
RTC
— Real-time counter with binary- or
decimal-based prescaler
• Input/Output
– Software selectable pullups on ports when used as inputs
– Software selectable slew rate control on ports when used
as outputs
– Software selectable drive strength on ports when used as
outputs
– Master reset pin and power-on reset (POR)
– Internal pullup on RESET, IRQ, and BKGD/MS pins to
reduce customer system cost
• Package Options
– 28-pin PDIP
– 28-pin SOIC
– 16-pin TSSOP
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008-2009. All rights reserved.
Table of Contents
1
2
3
MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
3.1 Parameter Classification . . . . . . . . . . . . . . . . . . . . . . . . .6
3.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . .6
3.3 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .7
3.4 ESD Protection and Latch-Up Immunity . . . . . . . . . . . . .8
3.5 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.6 Supply Current Characteristics . . . . . . . . . . . . . . . . . . .14
3.7 External Oscillator (XOSC) Characteristics . . . . . . . . .18
3.8 Internal Clock Source (ICS) Characteristics . . . . . . . .
3.9 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.10.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . .
3.10.2 TPM/MTIM Module Timing . . . . . . . . . . . . . . . .
3.11 Flash Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . .
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Mechanical Drawings. . . . . . . . . . . . . . . . . . . . . . . . . .
19
20
23
23
24
25
25
26
26
4
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision
1
2
Date
10/8/2008
1/16/2009
Initial public released.
In
Table 8,
added the Max. of S2I
DD
and S3I
DD
in 0–105
°C;
changed the Max. of S2I
DD
and
S3I
DD
in 0–85
°C;
changed the typical of S2I
DD
and S3I
DD
; changed the S23I
DDRTI
to P.
Description of Changes
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual
(MC9S08SE8RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MC9S08SE8 Series MCU Data Sheet, Rev. 2
2
Freescale Semiconductor
NXP MCU
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