74V2G126
DUAL BUS BUFFER (3-STATE)
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 3.8ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1µA(MAX.) at T
A
= 25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
IMPROVED LATCH-UP IMMUNITY
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2G126STR
DESCRIPTION
The 74V2G126 is an advanced high-speed CMOS
DUAL BUS BUFFER fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
3-STATE control input nG has to be set LOW to
place the output into the high impedance state.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V systems
and it is ideal for portable applications like
personal digital assistant, camcorder and all
battery-powered equipment.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/9
74V2G126
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 7
2, 5
3, 6
4
8
SYMBOL
1G, 2G
1A, 2A
2Y, 1Y
GND
V
CC
NAME AND FUNCTION
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
X
L
H
X: "H" or "L"
Z: High Impedance
G
L
H
H
Y
Z
L
H
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage (see note 1)
DC Output Voltage (see note 2)
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
−
20
−
20
±
25
±
50
-65 to +150
260
Unit
V
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
Storage Temperature
T
stg
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
1) V
CC
=0V or nG=V
CC
(Output in High Impedance state)
2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
V
O
T
op
dt/dv
Supply Voltage
Input Voltage
Output Voltage (see note 1)
Output Voltage (see note 2)
Operating Temperature
Input Rise and Fall Time (note 3) (V
CC
= 3.3
±
0.3V)
(V
CC
= 5.0
±
0.5V)
Parameter
Value
2 to 5.5
0 to 5.5
0 to 5.5
0 to V
CC
-55 to 125
0 to 100
0 to 20
Unit
V
V
V
V
°C
ns/V
ns/V
1) V
CC
=0V or nG=V
CC
(Output in High Impedance state)
2) High or Low State
3) V
IN
from 30% to 70% of V
CC
2/9
74V2G126
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
t
PLZ
t
PHZ
Output Disable
Time
3.3
(*)
3.3
(*)
5.0
(**)
5.0
(**)
3.3
(*)
t
PZL
t
PZH
Output Enable
Time
3.3
(*)
5.0
(**)
5.0
(**)
(*) Voltage range is 3.3V
±
0.3V
(**) Voltage range is 5.0V
±
0.5V
Value
T
A
= 25°C
Min.
Typ.
5.1
5.6
3.8
4.3
Max.
7.5
8.0
5.5
6.5
8.0
11.5
5.0
7.0
7.6
8.5
5.9
6.5
-40 to 85°C
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max.
8.5
9.5
6.5
7.5
9.0
12.5
6.0
8.0
9.5
10.0
7.0
7.5
-55 to 125°C
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max.
9.5
10.5
7.5
8.5
10.0
13.5
7.0
9.0
10.5
11.0
8.0
8.5
ns
ns
ns
Unit
C
L
(pF)
15
50
15
50
15
50
15
50
15
50
15
50
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
R
L
= 1 K
Ω
t
PLH
t
PHL
Propagation Delay
Time
5.4
7.9
3.6
5.1
5.4
5.9
3.7
4.1
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
T
A
= 25°C
Min.
C
IN
C
OUT
C
PD
Input Capacitance
Output
Capacitance
Power Dissipation
Capacitance
(note 1)
Typ.
4
6
14
Max.
10
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
pF
Unit
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/2
4/9
74V2G126
TEST CIRCUIT TEST CIRCUIT
TEST
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R1 = 1KΩ or equivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
SWITCH
Open
V
CC
GND
WAVEFORM 1 : PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
5/9
FPGA/CPLD
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