FDS6574A
May
2008
FDS6574A
20V N-Channel PowerTrench
®
MOSFET
General Description
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized for
low gate charge, low R
DS(ON)
and fast switching speed.
tmM
Features
•
16 A, 20 V.
R
DS(ON)
= 6 mΩ @ V
GS
= 4.5 V
R
DS(ON)
= 7 mΩ @ V
GS
= 2.5 V
R
DS(ON)
= 9 mΩ @ V
GS
= 1.8 V
•
Low gate charge
•
High performance trench technology for extremely
low R
DS(ON)
•
High power and current handling capability
Applications
•
DC/DC converter
•
RoHS Compliant
D
D
D
D
5
6
4
3
2
1
SO-8
S
S
S
G
7
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
Drain-Source Voltage
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
20
±
8
(Note 1a)
Units
V
V
A
W
16
80
2.5
1.2
1.0
–55 to +175
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
T
J
, T
STG
Operating and Storage Junction Temperature Range
°C
Thermal Characteristics
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
Package Marking and Ordering Information
Device Marking
FDS6574A
Device
FDS6574A
Reel Size
13’’
Tape width
12mm
Quantity
2500 units
©2008
Fairchild Semiconductor Corporation
FDS6574A Rev B2(W)
FDS6574A
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
T
A
= 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
(Note 2)
Test Conditions
V
GS
= 0 V,
I
D
= 250
µA
Min
20
Typ
Max Units
V
Off Characteristics
I
D
= 250
µA,
Referenced to 25°C
V
DS
= 16 V,
V
GS
= 8 V,
V
GS
= –8 V
V
DS
= V
GS
,
V
GS
= 0 V
V
DS
= 0 V
V
DS
= 0 V
I
D
= 250
µA
0.4
0.6
–2.7
4
4.4
5
5.3
115
7657
1432
775
V
DD
= 10 V,
I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
Ω
19.5
22
173
82
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 16 A,
75
9
17
2.1
(Note 2)
10
1
100
–100
1.5
mV/°C
µA
nA
nA
V
mV/°C
6
7
9
9
mΩ
On Characteristics
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
I
D
= 250
µA,
Referenced to 25°C
V
GS
= 4.5 V,
I
D
= 16 A
V
GS
= 2.5 V,
I
D
= 15 A
V
GS
= 1.8 V,
I
D
= 13 A
V
GS
= 4.5 V, I
D
= 16 A,T
J
=125°C
V
GS
= 4.5 V,
V
DS
= 5 V
V
DS
= 5 V,
V
DS
= 10V,
f = 1.0 MHz
I
D
= 16 A
V
GS
= 0 V,
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
40
A
S
pF
pF
pF
Dynamic Characteristics
Switching Characteristics
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
35
36
277
131
105
ns
ns
ns
ns
nC
nC
nC
A
V
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
V
GS
= 0 V, I
S
= 2.1 A
Voltage
0.56
1.2
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θCA
is determined by the user's board design.
a) 50°C/W when
mounted on a 1in
2
pad of 2 oz copper
b) 105°C/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS6574A Rev B2(W)
FDS6574A
Typical Characteristics
100
V
GS
= 4.5V
3.5V
2
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2.5V
1.8V
1.5V
I
D
, DRAIN CURRENT (A)
80
1.8
V
GS
= 1.5V
1.6
1.4
60
40
1.8V
1.2
1
0.8
0
20
40
60
80
100
I
D
, DIRAIN CURRENT (A)
2.5V
20
3.0V
3.5V
4.5V
0
0
0.5
1
1.5
2
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.012
R
DS(ON)
, ON-RESISTANCE (OHM)
1.6
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= 16A
V
GS
= 4.5V
I
D
= 8A
0.01
1.4
1.2
0.008
T
A
= 125
o
C
0.006
1
0.8
0.004
T
A
= 25
o
C
1
2
3
4
5
0.6
-50
-25
0
25
50
75
100
o
0.002
125
150
175
T
J
, JUNCTION TEMPERATURE ( C)
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
90
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
I
S
, REVERSE DRAIN CURRENT (A)
V
GS
= 0V
V
DS
= 5V
75
I
D
, DRAIN CURRENT (A)
60
45
30
15
0
0.5
0.8
1.1
T
A
= -55
o
C
125
o
C
25
o
C
10
1
0.1
0.01
0.001
0.0001
T
A
= 125
o
C
25
o
C
-55
o
C
1.4
1.7
2
0
0.2
0.4
0.6
0.8
1
V
GS
, GATE TO SOURCE VOLTAGE (V)
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS6574A Rev B2(W)
FDS6574A
Typical Characteristics
5
V
GS
, GATE-SOURCE VOLTAGE (V)
10000
I
D
= 16 A
V
DS
= 5V
10V
8000
15V
CAPACITANCE (pF)
C
ISS
f = 1 MHz
V
GS
= 0 V
4
3
6000
2
4000
C
OSS
2000
C
RSS
1
0
0
15
30
45
60
75
90
Q
g
, GATE CHARGE (nC)
0
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
1000
P(pk), PEAK TRANSIENT POWER (W)
Figure 8. Capacitance Characteristics.
50
I
D
, DRAIN CURRENT (A)
100
R
DS(ON)
LIMIT
100µs
1ms
10ms
100ms
1s
10s
40
SINGLE PULSE
R
θJA
= 125°C/W
T
A
= 25°C
10
30
1
0.1
V
GS
= 4.5V
SINGLE PULSE
R
θJA
= 125
o
C/W
T
A
= 25
o
C
DC
20
10
0.01
0.01
0.1
1
10
100
0
0.001
0.01
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
0.2
R
θ
JA
(t) = r(t)
*
R
θ
JA
R
θ
JA
= 125 C/W
P(pk)
t
1
t
2
T
J
- T
A
= P * R
θ
JA
(t)
Duty Cycle, D = t
1
/ t
2
o
0.1
0.1
0.05
0.02
0.01
0.01
SINGLE PULSE
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS6574A Rev B2(W)
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global
subsidianries, and is not intended to be an exhaustive list of all such trademarks.
ACEx
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®
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®
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®
*
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®
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OPTOLOGIC
®
OPTOPLANAR
®
®
tm
PDP-SPM™
Power-SPM™
PowerTrench
®
Programmable Active Droop™
QFET
®
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* EZSWITCH™ and FlashWriter
®
are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1.
Life support devices or systems are devices or systems which,
(a) are intended for surgical implant into the body or (b)
support or sustain life, and (c) whose failure to perform when
properly used in accordance with instructions for use provided
in the labeling, can be reasonably expected to result in a
significant injury of the user.
2.
A critical component in any component of a life support,
device, or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or In Design
Definition
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
This datasheet contains preliminary data; supplementary data will be pub-
lished at a later date. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve the design.
This datasheet contains specifications on a product that is discontinued by
Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
FDS6574A Rev B2(W)
Preliminary
First Production
No Identification Needed
Obsolete
Full Production
Not In Production