Freescale Semiconductor
Technical Data
Document Number: MC33290
Rev 8.0, 8/2008
ISO K Line Serial Link Interface
The 33290 is a serial link bus interface device designed to provide
bi-directional half-duplex communication interfacing in automotive
diagnostic applications. It is designed to interface between the
vehicle’s on-board microcontroller and systems off-board the vehicle
via the special ISO K line. The 33290 is designed to meet the
Diagnostic Systems ISO9141 specification. The device’s K line bus
driver’s output is fully protected against bus shorts and
overtemperature conditions.
The 33290 derives its robustness to temperature and voltage
extremes by being built on a SMARTMOS process, incorporating
CMOS logic, bipolar/MOS analog circuitry, and DMOS power FETs.
Although the 33290 was principally designed for automotive
applications, it is suited for other serial communication applications.
It is parametrically specified over an ambient temperature range of
-40ºC
≤
T
A
≤
125ºC and 8.0 V
≤
V
BB
≤
18 V supply. The economical
SO-8 surface-mount plastic package makes the 33290 very cost
effective.
Features
•
•
•
•
•
•
•
•
•
•
•
33290
ISO9141 PHYSICAL INTERFACE
D SUFFIX
EF SUFFIX (PB-FREE)
98ASB42564B
8-PIN SOICN
ORDERING INFORMATION
Temperature
Range (T
A
)
-40 to 125°C
Package
Device
Operates Over Wide Supply Voltage of 8.0 to 18V
Operating Temperature of -40 to 125°C
MC33290D/R2
Interfaces Directly to Standard CMOS Microprocessors
MCZ33290EF/R2
ISO K Line Pin Protected Against Shorts to Ground
Thermal Shutdown with Hysteresis
ISO K Line Pin Capable of High Currents
ISO K Line Can Be Driven with up to 10 nF of Parasitic
Capacitance
8.0 kV ESD Protection Attainable with Few Additional Components
Standby Mode: No V
Bat
Current Drain with V
DD
at 5.0 V
Low Current Drain During Operation with V
DD
at 5.0 V
Pb-Free Packaging Designated by Suffix Code EF
8-SOICN
+VBAT
VDD
33290
VDD
MCU
Dx
SCIR D
x
SCITx D
CEN
RX
TX
ISO
GND
VDD
VBB
ISO K-Line
T xD
R xD
Figure 1. 33290 Simplified Application Diagram
Freescale Semiconductor, Inc. reserves the right to change the detail specifications, as
may be required, to permit improvements in the design of its products.
© Freescale Semiconductor, Inc., 2006-2008. All rights reserved.
INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VBB
1
50 V
3.0 kΩ
20 V
200
Ω
10 V
10 V
RX
6
ISO
4
Master
Bias
CEN
8
VDD
7
TX
5
R
Hys
40 V
125 kΩ
Thermal
Shutdown
125 kΩ
10 V
2.0 kΩ
10 V
GND
3
Figure 2. 33290 Simplified Block Diagram
33290
2
Analog Integrated Circuit Device Data
Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
VBB
NC
GND
ISO
1
1
2
2
3
3
4
4
88
77
66
55
CEN
VDD
RX
TX
Figure 3. 33290 Pin Connections
Table 1. 33290 Pin Definitions
Pin Number
1
2
3
4
5
6
7
8
Pin Name
VBB
NC
GND
ISO
TX
RX
VDD
CEN
Definition
Battery power through external resistor and diode.
Not to be connected.
(1)
Common signal and power return.
Bus connection.
Logic level input for data to be transmitted on the bus.
Logic output of data received on the bus.
Logic power source input.
Chip enable. Logic “1” for active state. Logic “0” for sleep state.
Notes
1. NC pins should not have any connections made to them. NC pins are not guaranteed to be open circuits.
33290
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Rating
VDD DC Supply Voltage
VBB Load Dump Peak Voltage
ISO Pin Load Dump Peak Voltage
(2)
ISO Short Circuit Current Limit
ESD Voltage
(3)
Human Body Model
(4)
Machine Model
(4)
ISO Clamp Energy
(5)
Storage Temperature
Operating Case Temperature
Operating Junction Temperature
Power Dissipation
T
A
= 25°C
Peak Package Reflow Temperature During Reflow
(6)
,
(7)
Thermal Resistance
Junction-to-Ambient
T
PPRT
R
θJA
150
V
ESD1
V
ESD2
E
clamp
T
stg
T
C
T
J
P
D
0.8
Note 7.
°C
°C/W
±2000
±200
10
-55 to +150
-40 to +125
-40 to +150
mJ
°C
°C
°C
W
Symbol
V
DD
V
BB(LD)
V
ISO
I
ISO(LIM)
Value
-0.3 to 7.0
45
40
1.0
Unit
V
V
V
A
V
Notes
2. Device will survive double battery jump start conditions in typical applications for 10 minutes duration, but is not guaranteed to remain
within specified parametric limits during this duration.
3. ESD data available upon request.
4. ESD1 testing is performed in accordance with the Human Body Model (C
ZAP
= 100 pF, R
ZAP
= 1500
Ω),
ESD2 testing is performed in
accordance with the Machine Model (C
ZAP
= 200 pF, R
ZAP
= 0
Ω).
5.
6.
7.
Nonrepetitive clamping capability at 25°C.
Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may
cause malfunction or permanent damage to the device.
Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow
Temperature and Moisture Sensitivity Levels (MSL),
Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e.
MC33xxxD enter 33xxx), and review parametrics.
33290
4
Analog Integrated Circuit Device Data
Freescale Semiconductor
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions of 4.75 V
≤
V
DD
≤
5.25 V, 8.0 V
≤
V
BB
≤
18 V, -40°C
≤
T
C
≤
125°C, unless otherwise
noted.
Characteristic
POWER AND CONTROL
V
DD
Sleep State Current
T
x
= 0.8 V
DD
, CEN = 0.3 V
DD
V
DD
Quiescent Operating Current
T
x
= 0.2 V
DD
, CEN = 0.7 V
DD
V
BB
Sleep State Current
V
BB
= 16 V, T
x
= 0.8 V
DD
, CEN = 0.3 V
DD
V
BB
Quiescent Operating Current
T
X
= 0.2 V
DD
, CEN = 0.7 V
DD
Chip Enable
Input High-Voltage Threshold
(8)
Input Low-Voltage Threshold
(9)
Chip Enable Pull-Down Current
(10)
T
X
Input Low-Voltage Threshold
R
ISO
= 510
Ω
(11)
T
X
Input High-Voltage Threshold
R
ISO
= 510
Ω
(12)
T
X
Pull-Up Current
(13)
R
X
Output Low-Voltage Threshold
R
ISO
= 510
Ω,
T
X
= 0.2 V
DD
, R
x
Sinking 1.0 mA
R
X
Output High-Voltage Threshold
R
ISO
= 510
Ω,
T
X
= 0.8 V
DD
, R
X
Sourcing 250 µA
Thermal Shutdown
(14)
T
LIM
V
OH(Rx)
0.8 V
DD
150
I
PU(Tx)
V
OL(Rx)
V
IH(Tx)
0.7 x V
DD
-40
V
IH(CEN)
V
IL(CEN)
I
PD(CEN)
V
IL(Tx)
0.7 V
DD
I
BB(Q)
I
BB(SS)
I
DD(Q)
I
DD(SS)
mA
Symbol
Min
Typ
Max
Unit
–
–
–
–
–
–
–
–
–
–
–
–
0.1
mA
1.0
µA
50
mA
1.0
V
–
0.3 V
DD
40
µA
V
–
2.0
–
0.3 x V
DD
V
–
–
–
-2.0
µA
V
–
–
–
170
0.2 V
DD
V
–
–
°C
Notes
8. When IBB transitions to >100 µA.
9. When IBB transitions to <100 µA.
10. Enable pin has an internal current pull-down. Pull-down current is measured with CEN pin at 0.3 V
DD
.
11.
12.
13.
14.
Measured by ramping T
X
down from 0.7 V
DD
and noting T
X
value at which ISO falls below 0.2 V
BB
.
Measured by ramping T
X
up from 0.3 V
DD
and noting the value at which ISO rises above 0.9 V
BB
.
T
x
pin has internal current pull-up. Pull-up current is measured with T
X
pin at 0.7 V
DD
.
Thermal Shutdown performance (T
LIM
) is guaranteed by design but not production tested
.
33290
Analog Integrated Circuit Device Data
Freescale Semiconductor
5
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