HD74LV221A
Dual Monostable Multivibrators
REJ03D0326–0600Z
(Previous ADE-205-271D (Z))
Rev.6.00
Jun. 23, 2004
Description
The HD74LV221A features output pulse-duration control by three methods. In the first method, the
A
input is low and
the B input goes high. In the second method, the B input is high and the
A
input goes low. In the third method, the
A
input is low, the B input is high, and the clear (CLR) input goes high.
The basic pulse duration is programmed by selecting external resistance and capacitance values. The external timing
capacitor must be connected between Cext and Rext/Cext (positive) and an external resistor connected between
Rext/Cext and V
CC
.
To obtain variable pulse durations, connect an external variable resistance between Rext/Cext and V
CC
. Pulse duration
can be reduced by taking
CLR
low.
Features
•
•
•
•
•
V
CC
= 2.0 V to 5.5 V operation
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Output current ±6 mA (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
CC
= 4.5 V to 5.5 V)
Ordering Information
Package Type
SOP–16 pin (JEITA)
SOP–16 pin (JEDEC)
TSSOP–16 pin
Package Code
FP–16DAV
FP–16DNV
TTP–16DAV
Package
Abbreviation
FP
RP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Part Name
HD74LV221AFPEL
HD74LV221ARPEL
HD74LV221ATELL
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
CLR
L
X
X
H
H
↑
Note: H:
L:
X:
↑:
↓:
A
X
H
X
L
↓
L
High level
Low level
Immaterial
Low to high transition
High to low transition
: High level pulse
: Low level pulse
B
X
X
L
↑
H
H
Outputs
Q
L
L
L
Q
H
H
H
Rev.6.00 Jun. 23, 2004 page 1 of 13
HD74LV221A
Pin Arrangement
1A 1
1B
1CLR
2
3
16 V
CC
15 1Rext / Cext
14 1Cext
13 1Q
12 2Q
11 2CLR
10 2B
9 2A
1Q 4
2Q
2Cext
2Rext / Cext
5
6
7
GND 8
(Top view)
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
Output voltage range*
1, 2
Input clamp current
Output clamp current
Continuous output current
Continuous current through
V
CC
or GND
Maximum power dissipation at
3
Ta = 25°C (in still air)*
Storage temperature
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 7.0
–0.5 to 7.0
–0.5 to V
CC
+ 0.5
–0.5 to 7.0
–20
±50
±25
±50
785
500
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
°C
Conditions
Output: H or L
V
CC
: OFF
V
I
< 0
V
O
< 0 or V
O
> V
CC
V
O
= 0 to V
CC
SOP
TSSOP
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.6.00 Jun. 23, 2004 page 2 of 13
HD74LV221A
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
V
CC
V
I
V
O
I
OH
Min
2.0
0
0
—
—
—
—
—
—
—
—
0
0
0
5
1
—
1
–40
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
unlimited
Max
5.5
5.5
V
CC
–50
–2
–6
–12
50
2
6
12
200
100
20
—
—
—
—
85
Unit
V
V
V
µA
mA
Conditions
I
OL
µA
mA
Input transition rise or fall rate
∆t
/∆v
ns/V
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.0 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.3 to 2.7 V
V
CC
= 3.0 to 3.6 V
V
CC
= 4.5 to 5.5 V
V
CC
= 2.0 V
V
CC
≥
2.3 V
External timing resistance
External timing capacitance
Power-up ramp rate
Operating free-air temperature
Rext
Cext
∆t
/∆V
CC
Ta
kΩ
F
ms/V
°C
—
—
Note: Unused or floating inputs must be held high or low.
Logic Diagram
A
Q
Q
B
Q
CLR
CLR
Q
Rev.6.00 Jun. 23, 2004 page 3 of 13
HD74LV221A
DC Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol
V
IH
V
CC
(V)
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
2.0
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Min to Max
2.3
3.0
4.5
Min to Max
2.3
3.0
4.5
0 to 5.5
5.5
5.5
2.3
3.0
4.5
5.5
0
3.3
Min
1.5
V
CC
×
0.7
V
CC
×
0.7
V
CC
×
0.7
—
—
—
—
V
CC
– 0.1
2.0
2.48
3.8
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max
—
—
—
—
0.5
V
CC
×
0.3
V
CC
×
0.3
V
CC
×
0.3
—
—
—
—
0.1
0.4
0.44
0.55
±1
±2.5
20
220
280
650
975
5
—
Unit
V
Test Conditions
V
IL
Output voltage
V
OH
V
V
OL
V
Input current
Input current
Rext / Cext
Quiescent supply
current
Active state supply
current (per circuit)
I
IN
I
IN
I
CC
∆I
CC
µA
µA
µA
µA
I
OH
= –50
µA
I
OH
= –2 mA
I
OH
= –6 mA
I
OH
= –12 mA
I
OL
= 50
µA
I
OL
= 2 mA
I
OL
= 6 mA
I
OL
= 12 mA
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND
V
IN
= V
CC
or GND, I
O
= 0
V
IN
= V
CC
or GND
Rext/Cext = 0.5 V
CC
Output leakage
current
Input capacitance
I
OFF
C
IN
—
—
—
4.0
µA
pF
V
I
or V
O
= 0 V to 5.5 V
V
I
= V
CC
or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.6.00 Jun. 23, 2004 page 4 of 13
HD74LV221A
Switching Characteristics
V
CC
= 2.5 ± 0.2 V
Ta = 25°C
Item
Propagation
delay time
Symbol
t
PLH
t
PHL
Min
—
—
—
—
—
—
6.0
—
90
0.9
∆t
wQ
—
Typ
13.3
15.5
10.9
12.5
13.5
15.9
—
170
100
1.0
±1
Max
31.4
36.0
25.0
32.8
33.4
38.0
—
260
110
1.1
—
Ta = –40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
6.5
—
90
0.9
—
Max
37.0
42.0
29.5
34.5
39.0
44.0
—
320
110
1.1
—
Unit
ns
Test
Conditions
FROM
(Input)
TO
(Output)
Pulse width
Output pulse
width
t
w
t
wQ
ns
ns
µs
ms
%
C
L
= 15 pF
A or B
Q or
Q
C
L
= 50 pF
C
L
= 15 pF
CLR
Q or
Q
C
L
= 50 pF
C
L
= 15 pF
CLR
Q or
Q
(Trigger)
C
L
= 50 pF
A,
B or
CLR
C
L
= 50 pF, Cext = 28 pF, Rext = 2 kΩ
C
L
= 50 pF,
Cext = 0.01
µF,
Rext = 10 kΩ
C
L
= 50 pF,
Cext = 0.1
µF,
Rext = 10 kΩ
C
L
= 50 pF
V
CC
= 3.3 ± 0.3 V
Ta = 25°C
Item
Propagation
delay time
Symbol
t
PLH
t
PHL
Min
—
—
—
—
—
—
5.0
—
90
0.9
∆t
wQ
—
Typ
9.9
11.6
8.3
9.7
9.9
11.6
—
150
100
1.0
±1
Max
20.6
24.1
15.8
19.3
22.4
25.9
—
240
110
1.1
—
Ta = –40 to 85°C
Min
1.0
1.0
1.0
1.0
1.0
1.0
5.0
—
90
0.9
—
Max
24.0
27.5
18.5
22.0
26.0
29.5
—
300
110
1.1
—
Unit
ns
Test
Conditions
FROM
(Input)
TO
(Output)
Pulse width
Output pulse
width
t
w
t
wQ
ns
ns
µs
ms
%
C
L
= 15 pF
A or B
Q or
Q
C
L
= 50 pF
C
L
= 15 pF
CLR
Q or
Q
C
L
= 50 pF
C
L
= 15 pF
CLR
Q or
Q
(Trigger)
C
L
= 50 pF
A,
B or
CLR
C
L
= 50 pF, Cext = 28 pF, Rext = 2 kΩ
C
L
= 50 pF,
Cext = 0.01
µF,
Rext = 10 kΩ
C
L
= 50 pF,
Cext = 0.1
µF,
Rext = 10 kΩ
C
L
= 50 pF
Rev.6.00 Jun. 23, 2004 page 5 of 13
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