2SK2569
Silicon N Channel MOS FET
REJ03G1018-0300
Rev.3.00
Dec 27, 2006
Application
High speed power switching
Features
•
•
•
•
Low on-resistance.
R
DS(on)
= 2.6
Ω
max. (at V
GS
= 4 V, I
D
= 100 mA)
2.5 V gate drive device.
Small package (MPAK).
Outline
RENESAS Package code: PLSP0003ZB-A
(Package name: MPAK)
D
3
1
2
G
1. Source
2. Gate
3. Drain
S
Note:
Marking is "ZN–"
Rev.3.00 Dec 27, 2006 page 1 of 6
2SK2569
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Channel dissipation
Channel temperature
Storage temperature
Note: 1. PW
≤
10
µs,
duty cycle
≤
1 %
Symbol
V
DSS
V
GSS
I
D
I
D(pulse)
*
1
Pch*
2
Tch
Tstg
Ratings
50
±20
0.2
0.4
150
150
–55 to +150
Unit
V
V
A
A
mW
°
C
°
C
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Gate to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Gate to source cutoff voltage
Static drain to source on state
resistance
Static drain to source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Note: 2. Pulse test
Symbol
V
(BR)DSS
V
(BR)GSS
I
DSS
I
GSS
V
GS(off)
R
DS(on)1
R
DS(on)2
|y
fs
|
Ciss
Coss
Crss
t
d(on)
t
r
t
d(off)
t
f
Min
50
±20
—
—
0.5
—
—
0.13
—
—
—
—
—
—
—
Typ
—
—
—
—
—
2.0
3.1
0.23
14.0
17.2
1.73
40
86
1120
430
Max
—
—
1.0
±2.0
1.5
2.6
5.0
—
—
—
—
—
—
—
—
Unit
V
V
µA
µA
V
Ω
Ω
S
pF
pF
pF
ns
ns
ns
ns
Test Conditions
I
D
= 100
µA,
V
GS
= 0
I
G
=
±100 µA,
V
DS
= 0
V
DS
= 40 V, V
GS
= 0
V
GS
=
±16
V, V
DS
= 0
I
D
= 10
µA,
V
DS
= 5 V
I
D
= 100 mA, V
GS
= 4 V*
2
I
D
= 40 mA, V
GS
= 2.5 V*
2
I
D
= 100 mA, V
DS
= 10 V
V
DS
= 10 V, V
GS
= 0,
f = 1 MHz
V
GS
= 10 V, I
D
= 100 mA,
R
L
= 300
Ω
Rev.3.00 Dec 27, 2006 page 2 of 6
2SK2569
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
1
1 ms
0.3
150
Pch (mW)
200
PW
Drain Current I
D
(A)
=
10
0.1
s
m
D
C
Channel Dissipation
O
pe
100
0.03
0.01
0.003
Operation in
this area is
limited by R
DS(on)
ra
tio
n
50
0
50
100
150
200
0.001 Ta = 25°C
0.1 0.3
1
3
10
30
100
Case Temperature
Tc (°C)
Drain to Source Voltage V
DS
(V)
Typical Output Characteristics
0.20
10 V 4 V
2.3 V
0.20
Typical Transfer Characteristics
Drain Current I
D
(A)
Drain Current I
D
(A)
0.16
2.5 V
0.16
25°C
Tc = 75°C
–25°C
0.08
0.12
2V
0.12
0.08
0.04
Pulse Test
0
2
4
V
GS
= 1.5 V
0.04
V
DS
= 5 V
Pulse Test
6
8
10
0
1
2
3
4
5
Drain to Source Voltage V
DS
(V)
Drain to Source Saturation Voltage
vs. Gate to Source Voltage
0.5
Pulse Test
Gate to Source Voltage V
GS
(V)
Static Drain to Source on State
Resistance vs. Drain Current
20
Pulse Test
10
5
V
GS
= 2.5 V
Drain to Source Saturation Voltage V
DS (on)
(V)
0.4
I
D
= 0.2 A
0.3
Static Drain to Source on State Resistance
R
DS (on)
(Ω)
2
4V
1
0.5
0.2
0.01 0.02
0.2
0.1 A
0.1
0.05 A
0
2
4
6
8
10
0.05
0.1
0.2
0.5
1
Gate to Source Voltage V
GS
(V)
Drain Current I
D
(A)
Rev.3.00 Dec 27, 2006 page 3 of 6
2SK2569
Static Drain to Source on State
Resistance vs. Temperature
Forward Transfer Admittance
y
fs
(S)
10
Pulse Test
8
I
D
= 0.2 A
V
GS
= 2.5 V
Static Drain to Source on State Resistance
R
DS (on)
(Ω)
Forward Transfer Admittance
vs. Drain Current
0.5
0.2
0.1
0.05
Tc = –25°C
25°C
75°C
6
0.1 A
0.05 A
0.2 A
0.05, 0.1 A
4
0.02
0.01
0.005
0.001 0.003
0.01
0.03
2
4V
0
–40
0
40
V
DS
= 10 V
Pulse Test
0.1
0.3
1
80
120
160
Case Temperature T
C
(°C)
Drain Current I
D
(A)
Typical Capacitance vs.
Drain to Source Voltage
100
30
2
1
Ciss
10
Coss
3
1
0.3
0.1
0
Crss
Switching Characteristics
td(off)
Switching Time t (µs)
Capacitance C (pF)
0.5
0.2
0.1
tf
tr
td(on)
V
GS
= 0
f = 1 MHz
10
20
30
40
50
V
GS
= 10 V
0.05
V
DD
= 30 V
PW = 5
µs
duty < 1 %
0.02
0.01 0.02 0.05
0.1
0.2
0.5
1
Drain to Source Voltage V
DS
(V)
Reverse Drain Current vs.
Source to Drain Voltage
0.20
Drain Current
I
D
(A)
Reverse Drain Current I
DR
(A)
0.16
0.12
–5 V
V
GS
= 0
0.08
0.04
Pulse Test
0
0.2
0.4
0.6
0.8
1.0
Source to Drain Voltage
V
SD
(V)
Rev.3.00 Dec 27, 2006 page 4 of 6
2SK2569
Switching Test Circuit
Vin Monitor
D.U.T.
R
L
V
DD
= 30 V
90%
td(on)
tr
90%
td(off)
tf
Vin
Vout
Vin
10 V
50
Ω
10%
10%
10%
Vout
Monitor
Waveform
90%
Rev.3.00 Dec 27, 2006 page 5 of 6
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