PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
M32C/8B Group
RENESAS MCU
REJ03B0242-0050
Rev.0.50
Oct 31, 2008
1.
1.1
Overview
Features
The M32C/8B Group is a single-chip control MCU, fabricated using high-performance silicon gate CMOS
technology, embedding the M32C/80 Series CPU core. The M32C/8B Group is housed in 144-pin and 100-pin
plastic molded LQFP packages.
With a 16-Mbyte address space, this MCU combines advanced instruction manipulation capabilities to process
complex instructions by less bytes and execute instructions at higher speed.
The M32C/8B Group has a multiplier and DMAC adequate for office automation, communication devices and
industrial equipment, and other high-speed processing applications.
1.1.1
Applications
•
Audio-Visual equipment (e.g. televisions, audio components)
•
Home Appliances (e.g. air conditioners, washing machines, sewing machines)
•
Industrial equipment (e.g. programmable logic controllers)
•
Computers and peripherals, cameras, etc.
1.1.2
Specifications
Tables 1.1 to 1.4 list the specifications of the M32C/8B Group.
REJ03B0242-0050 Rev.0.50 Oct 31, 2008
Page 1 of 67
Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M32C/8B Group
Table 1.1
Item
CPU
Specifications (144-Pin Package) (1/2)
Function
Central processing unit
1. Overview
Specification
M32C/80 core (multiplier: 16 bits × 16 bits
→
32 bits,
multiply-addition operation instructions: 16 × 16 + 48
→
48 bits)
• Basic instructions: 108
• Minimum instruction execution time:
31.3 ns (f(CPU) = 32 MHz / VCC1 = 3.0 to 5.5 V)
• Operating modes: Single-chip mode, memory expansion mode,
and microprocessor mode
Memory
ROM / RAM
Flash memory version: 256KB + 8KB/32 KB, 128KB + 8KB/32 KB
ROMless version
:
−
/ 32KB
Power Supply Voltage Detection
Voltage monitor interrupt (optional)
(1)
External
Bus / memory expansion • Address space: 16 Mbyte
Bus
function
• External bus interface: 1 to 7 wait states can be inserted,
Expansion
4 chip select outputs, 3 V and 5 V interfaces
• Bus format: Switchable between separate bus and multiplexed
bus formats, switchable data bus width (8-bit or 16-bit)
Clock
Clock generation circuits • 4 circuits:
Main clock, sub clock, on-chip oscillator,
PLL frequency synthesizer
• Oscillation stop detection:
Main clock oscillation stop detect function
• Frequency divider circuit:
Dividing ratio selectable among 1, 2, 3, 4, 6, 8, 10, 12, 14, 16
• Low power consumption features: Wait mode, stop mode
Interrupts
• Interrupt vectors: 70
• External interrupt inputs:
11 (NMI, INT × 6, Key input × 4)
Single-chip mode
Memory expansion and microprocessor mode with 8-bit external bus
8 (NMI, INT × 3, Key input × 4)
Memory expansion and microprocessor mode with 16-bit external bus
• Interrupt priority levels: 7
Watchdog Timer
15-bit × 1 (with prescaler)
DMA
DMAC
• 4 channels, cycle steal method
• Trigger sources: 31
• Transfer modes: 2 (single transfer and repeat transfer)
DMACII
• Can be activated by all peripheral function interrupt sources
• Transfer modes: 2 (single transfer and burst transfer)
• Immediate transfer, calculation transfer, and chain transfer
functions
Timer
Timer A
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode,
pulse width modulation (PWM) mode
Event counter 2-phase pulse signal processing (2-phase
encoder input) × 3
Timer B
16-bit timer × 6
Timer mode, event counter mode, pulse period measurement
mode, pulse width measurement mode
Timer function for
3-phase inverter control × 1 (using timer A1, timer A2, timer A4,
3-phase motor control
and timer B2)
On-chip dead time timer
NOTE:
1. Please contact a Renesas sales office to use optional features.
REJ03B0242-0050 Rev.0.50 Oct 31, 2008
Page 2 of 67
Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M32C/8B Group
Table 1.2
Item
Serial
Interface
Specifications (144-Pin Package) (2/2)
Function
UART0 to UART4
1. Overview
A/D Converter
CRC-CCITT (X
16
+ X
12
+ X
5
+ 1) compliant
X/Y Converter
16 bits x 16 bits
I/O Ports
Programmable I/O ports • Input only: 1
• CMOS I/O:
121 (in single-chip mode)
81 (in memory expansion and microprocessor mode with 8-bit external bus)
73 (in memory expansion and microprocessor mode with 16-bit external bus)
with selectable pull-up resistor
• N channel open drain ports: 2
Flash Memory
•
Erase and program voltage: VCC1 = VCC2 = 3.0 to 5.5 V
•
Erase and program endurance: 100 times (all areas)
•
Program security: ROM code protect and ID code check
•
Debug functions: On-chip debug and on-board flash reprogram
Operating Frequency /
32 MHz / VCC1 = 3.0 to 5.5 V, VCC2 = 3.0 to VCC1
Supply Voltage
Current Consumption
26 mA (32 MHz / VCC1 = VCC2 = 5 V)
23 mA (32 MHz / VCC1 = VCC2 = 3.3 V)
110
μA
(approx. 1 MHz / VCC1 = VCC2 = 3.3 V,
on-chip oscillator low-power consumption mode
→
wait mode)
8
μA
(approx. 32 kHz / VCC1 = VCC2 = 3.3 V,
low-power consumption mode
→
wait mode)
4
μA
(VCC1 = VCC2 = 3.3 V, stop mode)
Operating Ambient Temperature (°C) -20 to 85°C, -40 to 85°C (optional)
(2)
Package
144-pin LQFP (PLQP0144KA-A)
NOTES:
1. IEBus is a registered trademark of NEC Electronics Corporation.
2. Please contact a Renesas sales office to use optional features.
D/A Converter
CRC Calculation Circuit
Specification
Clock synchronous / asynchronous × 5
I
2
C bus, special mode 2, GCI mode, SIM mode
IEBus (optional)
(1)(2)
10-bit resolution x 34 channels (in single-chip mode)
10-bit resolution x 18 channels (in memory expansion mode
and microprocessor mode)
including sample and hold function
8-bit resolution × 2 channels
REJ03B0242-0050 Rev.0.50 Oct 31, 2008
Page 3 of 67
Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M32C/8B Group
Table 1.3
Item
CPU
Specifications (100-Pin Package) (1/2)
Function
Central processing unit
1. Overview
Specification
M32C/80 core (multiplier: 16 bits × 16 bits
→
32 bits,
multiply-addition operation instructions: 16 × 16 + 48
→
48 bits)
• Basic instructions: 108
• Minimum instruction execution time:
31.3 ns (f(CPU) = 32 MHz / VCC1 = 3.0 to 5.5 V)
• Operating modes: Single-chip mode, memory expansion mode,
and microprocessor mode
Memory
ROM / RAM
Flash memory version: 256KB + 8KB/32 KB, 128KB + 8KB/32 KB
ROMless version
:
−
/ 32KB
Power Supply Voltage Detection
Voltage monitor interrupt (optional)
(1)
External
Bus / memory expansion • Address space: 16 Mbyte
Bus
function
• External bus interface: 1 to 7 wait states can be inserted,
Expansion
4 chip select outputs, 3 V and 5 V interfaces
• Bus format: Switchable between separate bus and multiplexed
bus formats, switchable data bus width (8-bit or 16-bit)
Clock
Clock generation circuits • 4 circuits:
Main clock, sub clock, on-chip oscillator,
PLL frequency synthesizer
• Oscillation stop detection:
Main clock oscillation stop detect function
• Frequency divider circuit:
Dividing ratio selectable among 1, 2, 3, 4, 6, 8, 10, 12, 14, 16
• Low power consumption features: Wait mode, stop mode
Interrupts
• Interrupt vectors: 70
• External interrupt inputs:
11 (NMI, INT × 6, Key input × 4)
Single-chip mode
Memory expansion and microprocessor mode with 8-bit external bus
8 (NMI, INT × 3, Key input × 4)
Memory expansion and microprocessor mode with 16-bit external bus
• Interrupt priority levels: 7
Watchdog Timer
15-bit × 1 (with prescaler)
DMA
DMAC
• 4 channels, cycle steal method
• Trigger sources: 31
• Transfer modes: 2 (single transfer and repeat transfer)
DMACII
• Can be activated by all peripheral function interrupt sources
• Transfer modes: 2 (single transfer and burst transfer)
• Immediate transfer, calculation transfer, and chain transfer
functions
Timer
Timer A
16-bit timer × 5
Timer mode, event counter mode, one-shot timer mode,
pulse width modulation (PWM) mode
Event counter 2-phase pulse signal processing (2-phase
encoder input) × 3
Timer B
16-bit timer × 6
Timer mode, event counter mode, pulse period measurement
mode, pulse width measurement mode
Timer function for
3-phase inverter control × 1 (using timer A1, timer A2, timer A4,
3-phase motor control
and timer B2)
On-chip dead time timer
NOTE:
1. Please contact a Renesas sales office to use optional features.
REJ03B0242-0050 Rev.0.50 Oct 31, 2008
Page 4 of 67
Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M32C/8B Group
Table 1.4
Item
Serial
Interface
Specifications (100-Pin Package) (2/2)
Function
UART0 to UART4
1. Overview
A/D Converter
CRC-CCITT (X
16
+ X
12
+ X
5
+ 1) compliant
X/Y Converter
16 bits x 16 bits
I/O Ports
Programmable I/O ports • Input only: 1
• CMOS I/O:
85 (in single-chip mode)
45 (in memory expansion and microprocessor mode with 8-bit external bus)
37 (in memory expansion and microprocessor mode with 16-bit external bus)
with selectable pull-up resistor
• N channel open drain ports: 2
Flash Memory Version
•
Erase and program voltage: VCC1 = VCC2 = 3.0 to 5.5 V
•
Erase and program endurance: 100 times (all areas)
•
Program security: ROM code protect and ID code check
•
Debug functions: On-chip debug and on-board flash reprogram
Operating Frequency /
32 MHz: VCC1 = 3.0 to 5.5 V, VCC2 = 3.0 to VCC1
Supply Voltage
Current Consumption
26 mA (32 MHz / VCC1 = VCC2 = 5 V)
23 mA (32 MHz / VCC1 = VCC2 = 3.3 V)
110
μA
(approx. 1 MHz / VCC1 = VCC2 = 3.3 V,
on-chip oscillator low-power consumption mode
→
wait mode)
8
μA
(approx. 32 kHz / VCC1 = VCC2 = 3.3 V,
low-power consumption mode
→
wait mode)
4
μA
(VCC1 = VCC2 = 3.3 V, stop mode)
Operating Ambient Temperature (°C) -20 to 85°C, -40 to 85°C (optional)
(2)
Package
100-pin LQFP (PLQP0100KB-A)
NOTES:
1. IEBus is a registered trademark of NEC Electronics Corporation.
2. Please contact a Renesas sales office to use optional features.
D/A Converter
CRC Calculation Circuit
Specification
Clock synchronous / asynchronous × 5
I
2
C bus, special mode 2, GCI mode, SIM mode
IEBus (optional)
(1)(2)
10-bit resolution x 26 channels (in single-chip mode)
10-bit resolution x 10 channels (in memory expansion mode and
microprocessor mode)
including sample and hold function
8-bit resolution × 2 channels
REJ03B0242-0050 Rev.0.50 Oct 31, 2008
Page 5 of 67
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