HD74HC4017
Decade Counter / Divider
REJ03D0644-0200
(Previous ADE-205-530)
Rev.2.00
Mar 30, 2006
Description
The HD74HC4017 is a 5-stage divide-by-10 Johnson counter with ten decoded outputs and a carry-out bit. High-speed
operation and spike-free outputs are obtained by use of the Johnson decade counter configuration.
The ten decoded outputs are normally low and go high only at their respective decimal time periods. A high signal on
Reset R asynchronously clears the decade counter and sets the carry output and Y
0
high. With
CE
low, the count is
advanced on a low-to-high transition at C input. Alternatively, if C is high, the count is advanced on a high-to-low
transition at
CE.
Each decoded output remains high for one full clock cycle. The carry output is high while Q
0
, Q
1
, Q
2
,
Q
3
or Q
4
is high, then is low while Q
5
, Q
6
, Q
7
, Q
8
or Q
9
is high.
Features
•
High Speed Operation
•
High Output Current: Fanout of 10 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1
µA
max
•
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
•
Ordering Information
Part Name
HD74HC4017P
HD74HC4017FPEL
HD74HC4017RPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
SOP-16 pin (JEDEC)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
Package
Abbreviation
P
FP
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Taping Abbreviation
(Quantity)
PRSP0016DG-A
RP
(FP-16DNV)
Note: Please consult the sales office for the above package availability.
Function Table
C
L
X
X
CE
X
H
X
L
X
X
H
Notes: 1. X: Don’t care
2. If n < 5 Carry = “H”, Otherwise = “L”
R
L
L
H
L
L
L
L
Decode Output = n
n
n
Q
0
n+1
n
n
n+1
Rev.2.00 Mar 30, 2006 page 1 of 10
HD74HC4017
Pin Arrangement
Q
5
Q
1
Q
0
Q
2
Q
6
Q
7
Q
3
GND
1
2
3
4
5
6
7
8
(Top view)
Q
1
Q
0
Q
2
Q
6
Q
7
Q
3
Q
5
Reset
Clock
Clock
enable
Cout
Q
9
Q
4
16 V
CC
15 R
14 C
13
CE
12 Cout
11 Q
9
10 Q
4
9
Q
8
Q
8
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
V
CC
, GND current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
, V
OUT
I
IK
, I
OK
I
OUT
I
CC
or I
GND
P
T
Tstg
Ratings
–0.5 to 7.0
–0.5 to V
CC
+0.5
±20
±25
±50
500
–65 to +150
Unit
V
V
mA
mA
mA
mW
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Input rise / fall time
Note:
*1
Symbol
V
CC
V
IN
, V
OUT
Ta
t
r
, t
f
Ratings
2 to 6
0 to V
CC
–40 to 85
0 to 1000
0 to 500
0 to 400
Unit
V
V
°C
Conditions
V
CC
= 2.0 V
ns
V
CC
= 4.5 V
V
CC
= 6.0 V
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Rev.2.00 Mar 30, 2006 page 2 of 10
HD74HC4017
Electrical Characteristics
Ta = 25°C
Item
Input voltage
Symbol V
CC
(V)
V
IH
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
Min
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.18
5.68
—
—
—
—
—
—
—
Typ
—
—
—
—
—
—
2.0
4.5
6.0
—
—
0.0
0.0
0.0
—
—
—
—
Max
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.26
0.26
±0.1
4.0
Ta = –40 to+85°C
Min
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.13
5.63
—
—
—
—
—
—
—
Max
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.33
0.33
±1.0
40
Unit
V
Test Conditions
V
IL
V
Output voltage
V
OH
V
Vin = V
IH
or V
IL
I
OH
= –20
µA
V
OL
V
Vin = V
IH
or V
IL
I
OH
= –4 mA
I
OH
= –5.2 mA
I
OL
= 20
µA
Input current
Quiescent supply
current
Iin
I
CC
I
OH
= 4 mA
I
OH
= 5.2 mA
µA
Vin = V
CC
or GND
µA
Vin = V
CC
or GND, Iout = 0
µA
Rev.2.00 Mar 30, 2006 page 3 of 10
HD74HC4017
Switching Characteristics
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Ta = 25°C
Item
Maximum clock
frequency
Propagation delay
time
Symbol V
CC
(V)
f
max
2.0
4.5
6.0
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Pulse width
t
w
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Hold time
t
h
2.0
4.5
6.0
2.0
4.5
6.0
Output rise/fall
time
Input capacitance
t
TLH
t
THL
Cin
2.0
4.5
6.0
—
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
80
16
14
75
15
13
50
10
9
100
20
17
—
—
—
—
Typ
—
—
—
—
20
—
—
19
—
—
21
—
—
20
—
—
18
—
—
13
—
—
5
—
—
5
—
—
4
—
—
–3
—
—
6
—
5
Max
6
31
36
230
46
39
230
46
39
250
50
43
250
50
43
230
46
39
230
46
39
—
—
—
—
—
—
—
—
—
—
—
—
75
15
13
10
Ta = –40 to +85°C
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
100
20
17
95
19
16
65
13
11
125
25
21
—
—
—
—
Max
5
27
31
290
58
49
290
58
49
315
63
54
315
63
54
290
58
49
290
58
49
—
—
—
—
—
—
—
—
—
—
—
—
95
19
16
10
ns
ns
ns
ns
R to Q
ns
CE
to Q
ns
C to Q
Unit
MHz
Test Conditions
ns
C to Cout
ns
CE
to Cout
ns
R to Cout
Setup time
t
su
ns
Removal time
t
rem
ns
pF
Rev.2.00 Mar 30, 2006 page 4 of 10
HD74HC4017
Test Circuit
V
CC
V
CC
See Function Table
Input
Pulse Generator
Z
out
= 50
Ω
Input
Pulse Generator
Z
out
= 50
Ω
CE
Q
0
to Q
9
Clock
Cout
Reset
Output
Output
C
L
= 50 pF
C
L
= 50 pF
Note : 1. C
L
includes probe and jig capacitance.
Waveforms
•
Waveform – 1
t
r
Clock
t
f
V
CC
50%
50%
50%
0V
t
w
t
PLH
90%
t
w
t
PHL
90%
50%
10%
V
OH
V
OL
Qn
50%
10%
t
TLH
t
THL
Notes : 1. Input waveform: PRR
≤
1 MHz, Zo = 50
Ω,
t
r
≤
6 ns, t
f
≤
6 ns
2. Other inputs : R = "L",
CE
= "L"
Rev.2.00 Mar 30, 2006 page 5 of 10
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