HD74HC4060
14-stage Binary Counter
REJ03D0650-0200
(Previous ADE-205-537)
Rev.2.00
Mar 30, 2006
Description
The HD74HC4060 is a 14 stage counter, this device increments on the falling edge (negative transition) of the input
clock, and all their outputs are reset to a low level by applying a logical high on their reset input. The HD74HC4060
also has two additional inputs to enable easy connection of either an RC or crystal oscillator.
Features
•
High Speed Operation: t
pd
(Clock to Q
4
) = 41.5 ns typ (C
L
= 50 pF)
•
High Output Current: Fanout of 10 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1
µA
max
•
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
•
Ordering Information
Part Name
HD74HC4060P
HD74HC4060FPEL
Package Type
DILP-16 pin
SOP-16 pin (JEITA)
Package Code
(Previous Code)
PRDP0016AE-B
(DP-16FV)
PRSP0016DH-B
(FP-16DAV)
P
FP
Package
Abbreviation
—
EL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
Note: Please consult the sales office for the above package availability.
Function Table
Clock in
Reset
L
L
X
X: Irrelevant
H
Outputs State
No change
Advance to next stage
All outputs are low
Rev.2.00 Mar 30, 2006 page 1 of 6
HD74HC4060
Pin Arrangement
Q
12
Q
13
Q
14
Q
6
Q
5
Q
7
Q
4
GND
1
Q
12
2
3
4
5
6
7
8
(Top view)
Q
13
Q
14
Q
6
Q
5
Q
7
Q
4
Q
10
Q
8
Q
9
Reset
Clock in
Clock out 1
Clock out 2
15 Q
10
14 Q
8
13 Q
9
12 Reset
11 Clock in
10 Clock out 1
9
Clock out 2
16 V
CC
Block Diagram
Clock out 2
Clock out 1
Clock in
C
C
R
Q
Q
C
C
R
Q
Q
C
C
R
Q
Q
C
C
R
Q
Q
C
C
R
Q
Q
C
C
R
Q
Q
Reset
Q
4
R
C
C
R
C
C
R
C
C
R
C
C
R
C
C
R
C
C
R
C
C
Q
5
R
C
C
Q
6
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
Q
14
Q
13
Q
12
Q
10
Q
9
Q
8
Q
7
Timing Diagram
Clock in
Reset
Q
1
Q
2
Q
3
Q
4
Q
5
Q
6
Q
7
Q
8
Q
9
Q
10
Q
11
Q
12
Q
13
Q
14
1
2
4
8
16
32
64
128
256
512
1,024 2,048 4,096 8,192 16,384
Rev.2.00 Mar 30, 2006 page 2 of 6
HD74HC4060
Absolute Maximum Ratings
Item
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
V
CC
, GND current
Power dissipation
Symbol
V
CC
V
IN
, V
OUT
I
IK
, I
OK
I
OUT
I
CC
or I
GND
P
T
Ratings
–0.5 to 7.0
–0.5 to V
CC
+0.5
±20
±25
±50
500
Unit
V
V
mA
mA
mA
mW
Storage temperature
Tstg
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Recommended Operating Conditions
Item
Supply voltage
Input / Output voltage
Operating temperature
Input rise / fall time
Note:
*1
Symbol
V
CC
V
IN
, V
OUT
Ta
t
r
, t
f
Ratings
2 to 6
0 to V
CC
–40 to 85
0 to 1000
0 to 500
Unit
V
V
°C
ns
Conditions
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
0 to 400
1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item
Input voltage
Symbol V
CC
(V)
V
IH
2.0
4.5
6.0
2.0
4.5
6.0
Output voltage
V
OH
2.0
4.5
6.0
4.5
V
OL
6.0
2.0
4.5
6.0
4.5
6.0
Input current
Quiescent supply
current
Iin
I
CC
6.0
6.0
Ta = 25°C
Min
Typ Max
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.18
5.68
—
—
—
—
—
—
—
—
—
—
—
—
—
2.0
4.5
6.0
—
—
0.0
0.0
0.0
—
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.26
0.26
±0.1
4.0
Ta = –40 to+85°C
Unit
Min
Max
1.5
3.15
4.2
—
—
—
1.9
4.4
5.9
4.13
5.63
—
—
—
—
—
—
—
—
—
—
0.5
1.35
1.8
—
—
—
—
—
0.1
0.1
0.1
0.33
0.33
±1.0
40
I
OH
= 4 mA
I
OH
= 5.2 mA
µA
Vin = V
CC
or GND
µA
Vin = V
CC
or GND, Iout = 0
µA
V
Vin = V
IH
or V
IL
V
Vin = V
IH
or V
IL
I
OH
= –20
µA
V
Test Conditions
V
IL
V
I
OH
= –4 mA
I
OH
= –5.2 mA
I
OL
= 20
µA
Rev.2.00 Mar 30, 2006 page 3 of 6
HD74HC4060
Switching Characteristics
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Ta = 25°C
Item
Maximum clock
frequency
Propagation delay
time
Symbol V
CC
(V)
f
max
2.0
4.5
6.0
t
PLH
2.0
4.5
6.0
2.0
4.5
6.0
t
PHL
2.0
4.5
6.0
2.0
4.5
6.0
Pulse width
t
w
2.0
4.5
6.0
2.0
4.5
6.0
—
Min
—
—
—
—
—
—
—
—
—
—
—
—
100
20
17
80
16
14
—
—
—
—
Typ
—
—
—
—
42
—
—
41
—
—
16
—
—
10
—
—
7
—
—
5
—
5
Max
4
20
24
300
60
51
300
60
51
240
48
41
—
—
—
—
—
—
75
15
13
10
Ta = –40 to +85°C
Min
—
—
—
—
—
—
—
—
—
—
—
—
125
25
21
100
20
17
—
—
—
—
Max
3
16
19
375
75
63
375
75
63
300
60
51
—
—
—
—
—
—
95
19
16
10
pF
ns
ns
Reset to output
ns
Clock to Q
4
Unit
MHz
Test Conditions
t
PHL
ns
Clock to Q
4
Removal time
t
rem
ns
Output rise/fall
time
Input capacitance
t
TLH
t
THL
Cin
ns
Test Circuit
V
CC
V
CC
Output
See Function Table
Input
Pulse Generator
Z
out
= 50
Ω
Input
Pulse Generator
Z
out
= 50
Ω
Clock out1 Q
4
Clock out2
Clock in
Reset
Q
14
C
L
= 50 pF
Output
C
L
= 50 pF
Note : 1. C
L
includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 4 of 6
HD74HC4060
Waveforms
•
Waveform – 1
V
CC
Any Q
GND
t
r
Clock
90% 90%
50%
50%
10%
10%
t
f
V
CC
0V
50%
t
w
t
PLH
Q
1
90%
50%
10%
t
PHL
90%
50%
10%
V
OH
V
OL
t
TLH
t
THL
Note : 1. Input waveform : PRR
≤
1 MHz, Zo = 50
Ω,
t
r
≤
6 ns, t
f
≤
6 ns
•
Wavwform – 2
t
r
90%
50%
10%
90%
50%
10%
t
f
V
CC
0V
V
CC
10%
Reset
t
w
t
rem
90%
50%
Clock
t
PHL
90%
0V
V
OH
50%
10%
Any Q
V
OL
t
THL
Note : 1. Input waveform : PRR
≤
1 MHz, Zo = 50
Ω,
t
r
≤
6 ns, t
f
≤
6 ns
Rev.2.00 Mar 30, 2006 page 5 of 6
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