HN62454N Series
524288-word
×
8-bit/ 262144-word
×
16-bit CMOS Mask
Programmable ROM
ADE-203-404A (Z)
Preliminary
Rev. 0.1
Jul. 19, 1995
Description
The HN62454N is a 4-Mbit CMOS mask-Programmable ROM organized either as 262144 wordsby 16 bits or
524288 words by 8 bits. Realizing low power consumption, this memory is allowed for battery operation.
And a high speed access of 85/100 ns (max) is the most suitable to the system using a high speed micro-
computer by 16 bits.
Features
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Single 5 V supply
High speed
Normal access time: 85/100 ns (max)
Page access time: 35/40 ns (max)
Low power
Active: 660 mW (max)
Standby: 165
µW
(max)
Byte-wide or word-wide data organization (Switched by BHE terminal)
4 word page access on word-wide mode
8 byte page access on byte-wide mode
Three-state data output for or-tying
Directly TTL compatible
All inputs and outputs
Pin compatible with 4 Mbit EPROM (HN27C4000G/FP)
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Note: The specifications of this device are subject to change without notice. Please contact your nearest
Hitachi’s Sales Dept. regarding specifications.
HN62454N Series
Ordering Information
Type No.
HN62454NP-85
HN62454NP-10
HN62454NFA-85
HN62454NFA-10
HN62454NTT-85
HN62454NTT-10
Access time
85 ns
100 ns
85 ns
100 ns
85 ns
100 ns
Package
600 mil 40-pin plastic DIP (DP-40)
525 mil 40-pin plastic SOP (FP-40D)
400 mil 44-pin plastic TSOP II (TTP-44D)
2
HN62454N Series
Block Diagram
A12
A2
X Decoder
Memory Array
A17
A13
Address
Buffer
Y Decoder
Y Gates
A1
Page Decoder
A0
(A-1)
*1
Hex / Byte
BHE
OE
3-state output
buffer
CE
BHE = V
IH
: 16-bit (D15 to D0)
BHE = V
IL
: 8-bit (D7 to D0)
Note: 1. A-1 is least significant address.
When BHE is 'low', D14 to D8 goes the high impedance state, and D15 should be A-1.
D0
D15/(D7)
5