TRU050TBLNB-30.720MHZ datasheet, PDF

Datasheet> All Categories > Analog mixed-signal IC> The signal circuit> TRU050TBLNB-30.720MHZ

TRU050TBLNB-30.720MHZ: DescriptionPLL/Frequency Synthesis Circuit,; CategoryAnalog mixed-signal IC The signal circuit; File Size173KB，14 Pages; ManufacturerVectron International, Inc.; Websitehttp://www.vectron.com/; Environmental Compliance

Download Datasheet Parametric View All

TRU050TBLNB-30.720MHZ Overview

PLL/Frequency Synthesis Circuit,

TRU050TBLNB-30.720MHZ Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Vectron International, Inc.
package instruction	PACKAGE-16
Reach Compliance Code	compliant
Analog Integrated Circuits - Other Types	PHASE LOCKED LOOP
JESD-30 code	R-CDIP-T16
JESD-609 code	e4
length	20.32 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	260
Maximum seat height	4.69 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
Temperature level	INDUSTRIAL
Terminal surface	Gold (Au) - with Nickel (Ni) barrier
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	7.62 mm
Base Number Matches	1

Preview

Download Datasheet

View All

TRU050

Complete VCXO based Phase-Locked Loop

Features

•

Output Frequencies to 65.536 MHz

•

5.0 V or 3.3Vdc Operation

•

Tri-State Output

•

Holdover on Loss of Signal Alarm

•

VCXO with CMOS Outputs

•

0/70° or –40/85°C Temperature Range

•

Ceramic SMD Package

•

RoHS/Lead Free Compliant

The TRU050, VCXO based PLL

Description

The VI TRU050 is a user-configurable crystal-

based PLL integrated circuit. It includes a digital

phase detector, op-amp, VCXO and additional

integrated functions for use in digital

synchronization applications. Loop filter software

is available as well SPICE models for circuit

simulation.

Applications

•

Frequency Translation

•

Clock Smoothing

•

NRZ Clock Recovery

•

DSLAM, ADM, ATM, Aggregation, Optical

Switching/Routing, Base Station

•

Low Jitter PLL’s

Figure 1. TRU050 Block Diagram

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916

Page 1 of 14

Tel: 1-88-VECTRON-1

•

Web:

www.vectron.com

Rev : 06Jan2006

TRU050, VCXO Based PLL

TRU050 Theory of Operation

Phase Detector

The phase detector has two buffered inputs, DATAIN and CLKIN, which are designed to switch at 1.4

volts. DATAIN is designed to accept an NRZ data stream but may also be used for clock signals which

have about a 50% duty cycle. CLKIN is connected to OUT1 or OUT2, or a divided version of one of these

outputs. CLKIN and DATAIN and are protected by ESD diodes and should not exceed the power supply

voltage or ground by more than a few hundred millivolts.

The phase detector is basically a latched flip flop/exclusive-or gate/differential amplifier filter design to

produce a DC signal proportional to the phase between the CLKIN and DATAIN signals, see figure 4 for a

block diagram and figure 5 for a open loop transfer curve. This simplies the PLL design as the designer

does not have to filter narrow pulse signal to a DC level. Under locked conditions the rising edge CLKIN

will be centered in the middle of the DATAIN signal, see figure 6.

The phase detector gain is 0.53V/rad x data density for 5volt operation, and 0.35V/rad x data density for

3.3 volt operation. Data density = 1.0 for clock signals and is system dependent on coding and design

for NRZ signals, but 0.25 could be used as a starting point for data density.

The phase detector output is a DC signal for DATAIN frequencies greater than 1MHz but produces

signficant ripple when inputs are less than 200kHz. Additional filtering is required for low input frequency

applications such as 8kHz frequency translation, see figures 8 and 9.

Under closed loop conditions the active filter has a blocking capacitor which provides a very high DC

gain, so under normal locked conditions and input frequencies >1MHz, PHO will be about V

/2 and will

not vary signifigantly with changes in input frequency (within lock range). The control (voltage pin 1) will

vary according to the input frequency offset, but PHO will remain relatively constant.

Data In

(pin 7)

Clock In

(pin 9)

30 kΩ

20 kΩ

PHO

(pin 6)

Gain = 5 V / 2π

Gain = 2 / 3

Figure 4. Simplified Phase Detector Block Diagram

Vectron International, 267 Lowell Rd, Hudson NH 03051-4916

Page 4 of 14

Tel: 1-88-VECTRON-1

•

Web:

www.vectron.com

Rev : 06Jan2006

Recommended Resources

Peak voltage sample and hold circuit

Tacho generator voltage negative feedback circuit

Motor forward/reverse circuit driven by two differential circuits

Window discriminator with small hysteresis

Overvoltage or undervoltage action circuit

Tube Marantz 18 amplifier

I am looking for development example information on using a single chip microcomputer to control the dynamic display of an LED dot matrix screen.: I can now display a few words on a dot matrix screen. I want to use a computer as the host computer to change the content at any time to display it on the LED screen. Thank you!...; icy1.0 Embedded System

Looking for an AMI model of DSP 6678 for simulation purposes: I recently designed a TMS320C6678 board and planned to simulate it at high speed. I can't find a model of the high-speed line. Can any expert help me? Thank you very much....; xxf爱电子 DSP and ARM Processors

Introduction to Driver Assistance System DAS: The power-assisted braking system originally installed on passenger cars and trucks, although all of them are mechanical structures, is usually referred to as DAS. Of course, the content of this term ...; frozenviolet Automotive Electronics

Help... Help... Thank you all... Urgent...: I am a novice and just started to develop Windows CE programs. When I deployed, I got an error like this... Could you please tell me what the error message is: The specified file is not a valid CE boo...; naphu Embedded System

Goodbye 2019, hello 2020. Some of the goals set in 2019 have not been achieved. It’s a pity. Let’s continue to work hard in 2020.: In the past year: ① I have completed 80% of my goals, but I chose to avoid the things I wanted to accomplish the most. I did not complete the goals I wanted to achieve. Some things may be missed for a...; huwei900823 Talking

Using H6101 to make 12-85V to 5V2.1A electric vehicle controller with 92% efficiency, step-down and constant voltage: I spent an afternoon to adjust the 12-85V input electric vehicle mobile phone car charger test board with this H6101 100V step-down constant voltage and constant current IC from Shenzhen Huixinchen El...; 940582232 Power technology

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components