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1.5 Ω On Resistance,
±15 V/12 V/±5 V,
iCMOS,
Dual SPDT Switch
ADG1436
FEATURES
1.5 Ω on resistance
0.3 Ω on-resistance flatness
0.1 Ω on-resistance match between channels
Continuous current per channel
LFCSP package: up to 400 mA
TSSOP package: up to 260 mA
Fully specified at +12 V, ±15 V, and ±5 V
No V
L
supply required
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP and 4 mm × 4 mm, 16-lead LFCSP packages
FUNCTIONAL BLOCK DIAGRAMS
ADG1436
S1A
D1
S1B
IN1
IN2
S2A
D2
S2B
06817-001
06817-002
APPLICATIONS
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Communication systems
Relay replacement
SWITCHES SHOWN FOR A ONE-INPUT LOGIC.
Figure 1. TSSOP Package
ADG1436
S1A
D1
S1B
S2A
D2
S2B
LOGIC
IN1
IN2
EN
SWITCHES SHOWN FOR A ONE-INPUT LOGIC.
Figure 2. LFCSP Package
GENERAL DESCRIPTION
The ADG1436 is a monolithic CMOS device containing two
independently selectable SPDT switches. An EN input on the
LFCSP package is used to enable or disable the device. When
disabled, all channels are switched off. Each switch conducts
equally well in both directions when on and has an input signal
range that extends to the supplies. In the off condition, signal
levels up to the supplies are blocked. Both switches exhibit
break-before-make switching action for use in multiplexer
applications.
The ADG1436 is designed on an
iCMOS®
process.
iCMOS
(industrial-CMOS) is a modular manufacturing process combining
high voltage CMOS (complementary metal-oxide semiconductor)
and bipolar technologies. It enables the development of a wide
range of high performance analog ICs capable of 33 V operation
in a footprint that no previous generation of high voltage parts
has been able to achieve. Unlike analog ICs using conventional
CMOS processes,
iCMOS
components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The on-resistance profile is very flat over the full analog input
range, ensuring excellent linearity and low distortion when
switching audio signals.
iCMOS
construction ensures ultralow
power dissipation, making the part ideally suited for portable
and battery-powered instruments.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
2.6 Ω maximum on resistance over temperature.
Minimum distortion.
Ultralow power dissipation: <0.03 μW.
16-lead TSSOP and 16-lead 4 mm × 4 mm LFCSP packages.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.
ADG1436
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
15 V Dual Supply .......................................................................... 3
12 V Single Supply ........................................................................ 4
5 V Dual Supply ............................................................................ 5
Continuous Current per Channel ...............................................6
Absolute Maximum Ratings ............................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions ............................8
Truth Table For Switches ..............................................................8
Typical Performance Characteristics ..............................................9
Terminology .................................................................................... 12
Test Circuits ..................................................................................... 13
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
3/09—Rev. 0 to Rev. A
Change to I
DD
Parameter, Table 1 ................................................... 3
Change to I
DD
Parameter, Table 2 ................................................... 4
7/08—Revision 0: Initial Version
Rev. A | Page 2 of
16
ADG1436
SPECIFICATIONS
15 V DUAL SUPPLY
V
DD
= 15 V ± 10%, V
SS
= −15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match
Between Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
DD
I
SS
V
DD
/V
SS
1
25°C
−40°C to +85°C
−40°C to +125°C
V
DD
to V
SS
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
dB typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
μA typ
μA max
V min/max
Test Conditions/Comments
1.5
1.8
0.1
0.18
0.28
0.36
±0.04
±0.55
±0.04
±0.55
±0.1
±2
2.3
2.6
V
S
= ±10 V, I
S
= −10 mA; see Figure 23
V
DD
= +13.5 V, V
SS
= −13.5 V
V
S
= ±10 V, I
S
= −10 mA
0.19
0.4
0.21
0.45
V
S
= ±10 V, I
S
= −10 mA
V
DD
= +16.5 V, V
SS
= −16.5 V
V
S
= ±10 V, V
S
= ±10 V; see Figure 24
V
S
= ±10 V, V
S
= ±10 V; see Figure 24
V
S
= V
D
= ±10 V; see Figure 25
±2
±2
±4
±12.5
±12.5
±35
2.0
0.8
0.005
±0.1
3.5
125
170
95
120
105
130
20
−20
−80
−80
0.011
110
−0.18
23
50
120
0.001
1
170
285
0.001
1.0
±4.5/±16.5
V
IN
= V
GND
or V
DD
215
140
150
245
155
170
10
R
L
= 300 Ω, C
L
= 35 pF
V
S
= +10 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 10 V; see Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= +10 V; see Figure 31
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 33
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 26
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see Figure 27
R
L
= 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz; see
Figure 29
R
L
= 50 Ω, C
L
= 5 pF; see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 28
f = 1 MHz, V
S
= 0 V
f = 1 MHz, V
S
= 0 V
f = 1 MHz, V
S
= 0 V
V
DD
= +16.5 V, V
SS
= −16.5 V
Digital Inputs = 0 V or V
DD
Digital Input = 5 V
Digital Inputs = 0 V, 5 V, or V
DD
GND = 0 V
Guaranteed by design, not subject to production test.
Rev. A | Page 3 of
16
ADG1436
12 V SINGLE SUPPLY
V
DD
= 12 V ± 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.
Table 2.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (R
ON
)
On-Resistance Match
Between Channels (∆R
ON
)
On-Resistance Flatness (R
FLAT(ON)
)
LEAKAGE CURRENTS
Source Off Leakage, I
S
(Off)
Drain Off Leakage, I
D
(Off)
Channel On Leakage, I
D
, I
S
(On)
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current, I
INL
or I
INH
Digital Input Capacitance, C
IN
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
t
ON
(EN)
t
OFF
(EN)
Break-Before-Make Time Delay, t
BBM
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
−3 dB Bandwidth
Insertion Loss
C
S
(Off)
C
D
(Off)
C
D
, C
S
(On)
POWER REQUIREMENTS
I
DD
I
DD
V
DD
1
25°C
−40°C to +85°C
−40°C to +125°C
0 V to V
DD
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
μA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
MHz typ
dB typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
V min/max
Test
Conditions/Comments
2.8
3.5
0.13
0.21
0.6
1.1
±0.04
±0.55
±0.04
±0.55
±0.1
±1
4.3
4.8
V
S
= 0 V to 10 V, I
S
= −10 mA; see Figure 23
V
DD
= +10.8 V, V
SS
= 0 V
V
S
= 0 V to 10 V, I
S
= −10 mA
0.23
1.2
0.25
1.3
V
S
= 0 V to 10 V, I
S
= −10 mA
V
DD
= 13.2 V, V
SS
= 0 V
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 24
V
S
= 1 V/10 V, V
D
= 10 V/1 V; see Figure 24
V
S
= V
D
= 1 V or 10 V; see Figure 25
±2
±2
±4
±12.5
±12.5
±35
2.0
0.8
0.001
±0.1
3.5
200
270
175
235
105
145
70
30
−80
−80
78
−0.3
40
80
140
0.001
1.0
170
285
5/16.5
V
IN
= V
GND
or V
DD
320
280
175
350
310
195
10
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see
Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see
Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S
= 8 V; see
Figure 30
R
L
= 300 Ω, C
L
= 35 pF
V
S1
= V
S2
= 8 V; see Figure 31
V
S
= 6 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 33
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see
Figure 26;
R
L
= 50 Ω, C
L
= 5 pF, f = 100 kHz; see
Figure 27
R
L
= 50 Ω, C
L
= 5 pF; see Figure 28
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz; see Figure 28
f = 1 MHz, V
S
= 6 V
f = 1 MHz, V
S
= 6 V
f = 1 MHz, V
S
= 6 V
V
DD
= 13.2 V
Digital inputs = 0 V or V
DD
Digital inputs = 5 V
GND = 0 V, V
SS
= 0 V
Guaranteed by design, not subject to production test.
Rev. A | Page 4 of
16
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