SN74AC564NE4 datasheet, PDF - EEWORLD Datasheet

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SN74AC564NE4: DescriptionBus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDIP20, ROHS COMPLIANT, PLASTIC, DIP-20; Categorylogic logic; File Size691KB，15 Pages; ManufacturerRochester Electronics; Websitehttps://www.rocelec.com/

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SN74AC564NE4 Overview

Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDIP20, ROHS COMPLIANT, PLASTIC, DIP-20

SN74AC564NE4 Parametric

Parameter Name	Attribute value
package instruction	DIP,
Reach Compliance Code	unknown
Other features	BROADSIDE VERSION OF 534
series	AC
JESD-30 code	R-PDIP-T20
length	25.4 mm
Logic integrated circuit type	BUS DRIVER
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
propagation delay (tpd)	15.5 ns
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
Base Number Matches	1

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SN54AC564, SN74AC564

OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS

WITH 3 STATE OUTPUTS

SCAS551D− NOVEMBER 1995 − REVISED OCTOBER 2003

2-V to 6-V V

Operation

Inputs Accept Voltages to 6 V

Max t

of 9 ns at 5 V

3-State Inverting Outputs Drive Bus Lines

Directly

Full Parallel Access for Loading

Flow-Through Architecture to Optimize

PCB Layout

SN54AC564 . . . J OR W PACKAGE

SN74AC564 . . . DB, DW, N, NS, OR PW PACKAGE

(TOP VIEW)

description/ordering information

The ’AC564 devices are octal D-type

edge-triggered flip-flops that feature inverting

3-state outputs designed specifically for driving

highly capacitive or relatively low-impedance

loads. They are particularly suitable for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

On the positive transition of the clock (CLK) input,

the Q outputs are set to the inverse logic levels set

up at the data (D) inputs.

A buffered output-enable (OE) input places the

eight outputs in either a normal logic state (high or

low logic levels) or the high-impedance state. In

the high-impedance state, the outputs neither

load nor drive the bus lines significantly. The

high-impedance state and increased drive

provide the capability to drive bus lines without

interface or pullup components.

GND

CLK

SN54AC564 . . . FK PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

OE does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

ORDERING INFORMATION

PDIP − N

SOIC − DW

−40 C 85°C

−40°C to 85 C

SOP − NS

SSOP − DB

TSSOP − PW

CDIP − J

−55 C 125°C

−55°C to 125 C

CFP − W

LCCC − FK

PACKAGE†

Tube

Tape and reel

Tube

Tape and reel

Tube

ORDERABLE

PART NUMBER

SN74AC564N

SN74AC564DW

SN74AC564DWR

SN74AC564NSR

SN74AC564DBR

SN74AC564PW

SN74AC564PWR

SNJ54AC564J

SNJ54AC564W

SNJ54AC564FK

AC564

SNJ54AC564J

SNJ54AC564W

SNJ54AC564FK

AC564

TOP-SIDE

MARKING

SN74AC564N

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303



2003, Texas Instruments Incorporated

•

DALLAS, TEXAS 75265

GND

CLK

SN74AC564NE4 Related Products

	SN74AC564NE4	SN74AC564DWE4	SN74AC564DBRE4	SN74AC564DBRG4	SN74AC564PWRE4	SN74AC564PWE4	SN74AC564PWG4
Description	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDIP20, ROHS COMPLIANT, PLASTIC, DIP-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, SOIC-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, SSOP-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, SSOP-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, TSSOP-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, TSSOP-20	Bus Driver, AC Series, 1-Func, 8-Bit, Inverted Output, CMOS, PDSO20, GREEN, PLASTIC, TSSOP-20
package instruction	DIP,	SOP,	SSOP,	SSOP,	TSSOP,	TSSOP,	TSSOP,
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown
series	AC	AC	AC	AC	AC	AC	AC
JESD-30 code	R-PDIP-T20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20	R-PDSO-G20
length	25.4 mm	12.8 mm	7.2 mm	7.2 mm	6.5 mm	6.5 mm	6.5 mm
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Number of digits	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2	2
Number of terminals	20	20	20	20	20	20	20
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SOP	SSOP	SSOP	TSSOP	TSSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)	15.5 ns	15.5 ns	15.5 ns	15.5 ns	15.5 ns	15.5 ns	15.5 ns
Maximum seat height	5.08 mm	2.65 mm	2 mm	2 mm	1.2 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	6 V	6 V	6 V	6 V	6 V	6 V	6 V
Minimum supply voltage (Vsup)	2 V	2 V	2 V	2 V	2 V	2 V	2 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	THROUGH-HOLE	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	2.54 mm	1.27 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
width	7.62 mm	7.5 mm	5.3 mm	5.3 mm	4.4 mm	4.4 mm	4.4 mm
Maker	-	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics	Rochester Electronics

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