When designing, you should try to ensure that there is a global reset signal, or ensure that the trigger and counter have been correctly cleared before use and the state machine is in a known state. T...
Dear experts, I need to shape a narrow pulse of 1ns width into a rectangular wave to facilitate pulse counting later. The general trigger cannot meet this performance. Please give me some advice~~~~...
[i=s]This post was last edited by bobde163 on 2015-12-12 13:45[/i] I received a call from the courier early this morning. I was wondering how it could be a courier since I haven’t bought anything onli...
Outpost: Building a Complete ProjectSection 1: Lighting up the LED Before talking about the first example, I want to explain several key learning issues to many friends who are new to ARM. Old enginee...
After writing the HDL code, it needs to be mapped to some basic sequential or combinational circuits in FPGA implementation. Are there any internal rules when mapping?...
Wang Xiaochuan, the "Wudaokou Goalkeeper", is going through a level that he has never gone through before. For example, Sogou's (NYSE: SOGO) financial report, artificial intelligence, and the futur...[Details]
"Originally, there are many people who can design very good
chips
, but the market does not give domestic
chips
the opportunity to iterate, and domestic companies cannot give engine...[Details]
1. About FPU transplantation As long as the chip has FPU function, the use of FPU is generally enabled by default. You can also select it in the Options tab; 2. About the transplantation of DSP li...[Details]
Serial Port: 一. USART_ITConfig(USART1, USART_IT_TXE, ENABLE): As long as the transmit register is empty, there will always be an interrupt. Therefore, if you are not sending data, turn off the tran...[Details]
I used the bit definition in my 51 program: bit flag. After defining it this way, I ran the program and downloaded it to the circuit board. I found that the flag was not the value I set, which led to...[Details]
The Vatican Secret Archives is one of the world's greatest historical collections, but many of its documents have never been transcribed. Recently, a project called Codice Ratio used a
combination...[Details]
Interrupts and timers implement a 24-hour clock. The program is as follows: #include reg52.h #define PORTLEN P0 sbit bit_select = P2^0; sbit seg_select = P2^1; unsigned char src = {0x3f,0x06,0...[Details]
In the packaging process of a production line, every time the conveyor belt of the production line delivers a product to the packaging machine, the "SP" terminal outputs a pulse to the T1 terminal of...[Details]
At the early morning of November 17th, Beijing time, at the Global Supercomputing Conference held in Denver, the United States, the "nonlinear earthquake simulation" application completed by the te...[Details]
On June 26, 2017, China's new generation of high-speed rail "Fuxing" realized its first two-way service between Shanghai and Beijing, with a maximum speed of 400 kilometers per hour and a standard ...[Details]
On the 25th, Qualcomm held a technology summit in Beijing, inviting almost all important Chinese partners in an extremely rare "show", including SMIC, China Mobile, Lenovo, Xiaomi, OPPO, vivo, ZTE ...[Details]
/******************************************************** **This program is a clock program using LCM12832 as display. **P1 port is used as keyboard input P1.0 = increase key; P11 is selection key **...[Details]
The transformation from traditional factories to smart factories will inevitably become the biggest "wave" in the future world manufacturing industry. How can traditional factories quickly achieve th...[Details]
#include //Header file corresponding to the microcontroller type, select Atmega8 for the experiment; #include #define uchar unsigned char #define uint unsigned int void init_1820(); write_1820(uc...[Details]
On December 14, it was reported that Samsung wanted to poach Taiwan's Micro LED supply chain, opening a new round of panel wars. JDI promotes high-precision VR LCD and accelerates the development o...[Details]
FPGA/CPLD
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