FEATURES ................................................................................................................................................................. 5
GENERAL DESCRIPTION ........................................................................................................................................ 7
DATA PROTECTION .................................................................................................................................................. 10
Table 2. Protected Area Sizes .......................................................................................................................... 11
(13) Page Program (PP) ................................................................................................................................... 21
(14) 4 x I/O Page Program (4PP) ...................................................................................................................... 22
(15) Continuously program mode (CP mode) ..................................................................................................... 22
(16) Deep Power-down (DP) ............................................................................................................................. 22
(17) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ................................................. 23
P/N: PM1383
2
REV. 1.1, OCT. 14, 2008
MX25L3235D
(18) Read Electronic Manufacturer ID & Device ID (REMS), (REMS2), (REMS4) ............................................. 23
Table 7. ID Definitions ....................................................................................................................................... 24
(19) Enter Secured OTP (ENSO) ...................................................................................................................... 24
POWER-ON STATE ................................................................................................................................................... 26
Table 11. Power-Up Timing and VWI Threshold ................................................................................................. 41
INITIAL DELIVERY STATE ....................................................................................................................................... 41
ORDERING INFORMATION ...................................................................................................................................... 44
PART NAME DESCRIPTION ..................................................................................................................................... 45
PACKAGE INFORMATION ......................................................................................................................................... 46
REVISION HISTORY ................................................................................................................................................. 49
P/N: PM1383
4
REV. 1.1, OCT. 14, 2008
MX25L3235D
32M-BIT [x 1/x 2/x 4] CMOS SERIAL FLASH
FEATURES
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
•
32M:33,554,432 x 1 bit structure or 16,772,216 x 2 bits (two I/O read mode) structure or 8,388,608 x 4 bits (four I/O
read mode) structure
• 1024 Equal Sectors with 4K byte each (32Mb)
- Any Sector can be erased individually
• 64 Equal Blocks with 64K byte each (32Mb)
- Any Block can be erased individually
• Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.5V to 2.5V
PERFORMANCE
• High Performance
- Fast read
- 1 I/O: 104MHz with 8 dummy cycles
- 4 I/O: 75MHz with 6 dummy cycles
- 2 I/O: 75MHz with 4 dummy cycles
- Fast access time: 104MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)
- Serial clock of four I/O read mode : 75MHz (15pF + TTL Load), which is equivalent to 300MHz
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Byte program time: 7us (typical)
- Continuously program mode (automatically increase address under word program mode)
- Fast erase time: 60ms (typ.)/sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 25s(typ.) /chip
• Low Power Consumption
- Low active read current: 25mA(max.) at 104MHz, 20mA(max.) at 66MHz and 10mA(max.) at 33MHz
- Low active programming current: 20mA (max.)
- Low active erase current: 20mA (max.)
- Low standby current: 20uA (max.)
• Typical 100,000 erase/program cycles
• 10 years data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions
- Additional 4K bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
-
Automatically erases and verifies data at selected sector
-
Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
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ADI Reference Circuit
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