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W1D256M72R8B-5AP-PA1

Description
256MX8 DDR DRAM MODULE, 0.5ns, DMA240, MO-237, DIMM-240
Categorystorage    storage   
File Size255KB,11 Pages
ManufacturerXILINX
Websitehttps://www.xilinx.com/
Download Datasheet Parametric View All

W1D256M72R8B-5AP-PA1 Overview

256MX8 DDR DRAM MODULE, 0.5ns, DMA240, MO-237, DIMM-240

W1D256M72R8B-5AP-PA1 Parametric

Parameter NameAttribute value
Parts packaging codeDIMM
package instructionDIMM,
Contacts240
Reach Compliance Codeunknown
access modeSINGLE BANK PAGE BURST
Maximum access time0.5 ns
Other featuresAUTO/SELF REFRESH
JESD-30 codeR-XDMA-N240
JESD-609 codee4
length133.35 mm
memory density2147483648 bit
Memory IC TypeDDR DRAM MODULE
memory width8
Number of functions1
Number of ports1
Number of terminals240
word count268435456 words
character code256000000
Operating modeSYNCHRONOUS
Maximum operating temperature55 °C
Minimum operating temperature
organize256MX8
Package body materialUNSPECIFIED
encapsulated codeDIMM
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
Maximum seat height2.7 mm
Maximum supply voltage (Vsup)1.9 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountNO
Temperature levelCOMMERCIAL
Terminal surfaceGOLD
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
width25.4 mm
Base Number Matches1
DDR2-400, 533
Single Rank, x8 Registered SDRAM DIMMs
256MB
512MB
1GB
2GB
-
-
-
-
W1D32M72R8
W1D64M72R8
W1D128M72R8
W1D256M72R8 (Preliminary*)
Figure 1: Available layouts
Layout A:
1.181"
Features:
240-pin Registered ECC DDR2 SDRAM Dual-In-
Line Memory Module for DDR2-400 and DDR2-533
JEDEC standard VDD=1.8V (+/- 0.1V) power
supply
One rank 256MB, 512MB, 1GB, and 2GB
Modules are built with 18 x8 DDR2 SDRAM
devices in a 60-ball FBGA package
ECC error detection and correction
Programmable CAS Latency of 3 and 4; Burst
Length of 4 and 8
Auto Refresh and Self Refresh Mode
OCD (Off-Chip Driver Impedance Adjustment) and
ODT (On-Die Termination)
SPD (Serial Presence Detect) with EEPROM
All input/output are SSTL_18 compatible
All contacts are gold plated
One clock delay for register
Layout B:
1.0"
Front view of double-sided DIMM (see detail physical dimensions
at the back)
Speed Grades:
-5
-3.75
Units
Module Speed Grade
PC2-3200 PC2-4200
Speed @ CL3
400
-
MHz
Speed @ CL4
400
533
MHz
Speed @ CL5
-
533
MHz
Note: See Product ordering for full naming guide
Speed Grade
Description:
The following specification covers the W1D32M72R8, W1D64M72R8, W1D128M72R8, and W1D256M72R8
family of Single-Rank Registered ECC DDR2 modules using x8 FBGA SDRAMs. Please reference Figure 1 for
available layout configurations and the product ordering guide on the final page of this specification for available
options including speed grade and silicon manufacturer.
Address Summary Table:
Module Configuration
Refresh
Device Configuration
Row Addressing
Column Addressing
Module Rank
256MB
32M x 72
8k
32M x 8
(9 components)
A0-A13
A0-A9
1
512MB
64M x 72
8K
64M x 8
(9 components)
A0-A13
A0-A9
1
1GB
128M x 72
8K
128M x 8
(9 components)
A0-A14
A0-A9
1
2GB
256M x 72
8K
256M x 8
(9 components)
A0-A14
A0-A9
1
*Specifications are for reference purposes only and are subject to change by Wintec without notice.
DDR2_RDIMM_1 rank_x8_spec
Rev. 1.0 - December, 04
Wintec Industries, Inc., reserves the right to change datasheets and/or products without any notice.
2004 Wintec Industries, Inc.
1
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