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ICS9248YF-162

Description
Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size472KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

ICS9248YF-162 Overview

Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48

ICS9248YF-162 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeSSOP
package instructionSSOP,
Contacts48
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G48
JESD-609 codee0
length15.875 mm
Number of terminals48
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency137 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
Master clock/crystal nominal frequency14.318 MHz
Certification statusNot Qualified
Maximum seat height2.794 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches1
Integrated
Circuit
Systems, Inc.
ICS9248-162
Frequency Generator & Integrated Buffers for PENTIUM/Pro
TM
& K6
General Description
The
ICS9248-162
is the single chip clock solution for various
mobile chipset platforms. It provides all necessary clock signals
for such a system.
Spread spectrum may be enabled through I
2
C programming.
Spread spectrum typically reduces system EMI by 8dB to
10dB. This simplifies EMI qualification without resorting to
board design iterations or costly shielding. The
ICS9248-162
employs a proprietary closed loop design, which tightly
controls the percentage of spreading over process and
temperature variations.
Features
•
•
•
•
Up to 137MHz frequency support
Spread Spectrum for EMI control
Serial I
2
C interface for Power Management,
Frequency Select, Spread Spectrum.
Provides the following system clocks
- 4-CPUs @ 2.5/3.3V, up to 137MHz.
(including CPUCLK_F)
- 9-SDRAMs @3.3V, up to 137MHz
(including SDRAM_F)
- 8-PCI @3.3V, CPU/2 or CPU/3
(including 1 free running PCICLK_F)
- 1-24/48MHz @3.3V
- 1-48MHz @3.3V fixed
- 2-REF @3.3V, 14.318MHz.
Efficient Power management scheme through PCI
and CLK STOP CLOCKS
Spread Spectrum ± .25%, & 0 to -0.5% down spread
•
•
Block Diagram
PLL2
48MHz
/2
X1
X2
BUFFER IN
CPUCLK_F
PLL1
Spread
Spectrum
FS(3:0)
SEL24_48#
STOP
Pin Configuration
VDDREF
REF0
GNDREF
X1
X2
VDDPCI
*CPU2.5_3.3#/PCICLK_F
*FS3/PCICLK0
GNDPCI
*SEL24_48#/PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDDPCI
BUFFER IN
GNDPCI
PCICLK5
PCICLK6
VDDCOR
PCI_STOP#
*PD#
GND48
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF1/FS2*
VDDLCPU
CPUCLK_F
CPUCLK0
GNDLCPU
CPUCLK1
CPUCLK2
CLK_STOP#
GNDSDR
SDRAM_F
SDRAM0
SDRAM1
VDDSDR
SDRAM2
SDRAM3
GNDSDR
SDRAM4
SDRAM5
VDDSDR
SDRAM6
SDRAM7
VDD48
48MHz/FS0*
24_48MHz/FS1*
24_48MHz
2
XTAL
OSC
REF(1:0)
3
CPUCLK (2:0)
LATCH
STOP
8
SDRAM (7:0)
SDRAM_F
POR
CLK_STOP#
PCI_STOP#
CPU2.5_3.3#
SDATA
SCLK
PD#
Control
Logic
Config.
Reg.
PCI
CLOCK
DIVDER
STOP
7
PCICLK (6:0)
PCICLK_F
Power Groups
VDDLCPU, GNDLCPU = CPUCLK [2:0], CPUCLK_F
VDDSDR, GNDSDR = SDRAMCLKS [7:0], SDRAM_F
VDDPCI, GNDPCI = PCICLKS [6:0], PCICLK_F
VDD48, GND48 = 48MHz, 24MHz
VDDREF, GNDREF = REF, X1, X2
VDDCOR = PLL CORE
9248-162 Rev A 8/31/00
48-Pin SSOP and TSSOP
* Internal Pull-up Resistor of 120K to VDD
Pentium is a trademark of Intel Corporation
I
2
C is a trademark of Philips Corporation
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.
ICS9248-162

ICS9248YF-162 Related Products

ICS9248YF-162 ICS9248YF-162-T ICS9248YF-162LF ICS9248YF-162LF-T ICS9248YG-162-T ICS9248YG-162 ICS9248YG-162LF ICS9248YG-162LF-T
Description Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 0.300 INCH, SSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 6.10 MM, 0.50 MM PITCH, TSSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 6.10 MM, 0.50 MM PITCH, TSSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 6.10 MM, 0.50 MM PITCH, TSSOP-48 Processor Specific Clock Generator, 137MHz, PDSO48, 6.10 MM, 0.50 MM PITCH, TSSOP-48
Is it lead-free? Contains lead Contains lead Lead free Lead free Contains lead Contains lead Lead free Lead free
Is it Rohs certified? incompatible incompatible conform to conform to incompatible incompatible conform to conform to
Parts packaging code SSOP SSOP SSOP SSOP TSSOP TSSOP TSSOP TSSOP
package instruction SSOP, SSOP, SSOP, SSOP, TSSOP, TSSOP, TSSOP, TSSOP,
Contacts 48 48 48 48 48 48 48 48
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48
JESD-609 code e0 e0 e3 e3 e0 e0 e3 e3
length 15.875 mm 15.875 mm 15.875 mm 15.875 mm 12.5 mm 12.5 mm 12.5 mm 12.5 mm
Number of terminals 48 48 48 48 48 48 48 48
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C 70 °C
Maximum output clock frequency 137 MHz 137 MHz 137 MHz 137 MHz 137 MHz 137 MHz 137 MHz 137 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SSOP SSOP SSOP SSOP TSSOP TSSOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225 260 260 240 240 260 260
Master clock/crystal nominal frequency 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz 14.318 MHz
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.794 mm 2.794 mm 2.794 mm 2.794 mm 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.635 mm 0.635 mm 0.635 mm 0.635 mm 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30 20 20 30 30
width 7.5 mm 7.5 mm 7.5 mm 7.5 mm 6.1 mm 6.1 mm 6.1 mm 6.1 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC CLOCK GENERATOR, PROCESSOR SPECIFIC

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