IMP5226
1
D
ATA
C
OMMUNICATIONS
18-Line Plug and Play
SCSI Terminator
The 18-channel IMP5226 SCSI terminator is part of IMP's family of high-
performance SCSI terminators that deliver true UltraSCSI performance.
The BiCMOS design offers superior performance over first generation
linear regulator/resistor based terminators.
IMP's new architecture employs high-speed adaptive elements for each
channel, thereby providing the fastest response possible - typically
35MHz, which is 100 times faster than the older linear regulator termi-
nator approach. The bandwidth of terminators based on the older
regulator/resistor terminator architecture is limited to 500kHz since a
large output stabilization capacitor is required.
The IMP architecture eliminates the external output compensation
capacitor and the need for transient output capacitors while maintaining
pin compatibility with first generation designs. Reduced component
count is inherent with the IMP5226.
The IMP5226 architecture tolerates marginal system designs. A key
improvement offered by the IMP5226 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to rec-
ommended SCSI hardware design guidelines, such as improper cable
lengths and impedance. Frequently, this situation is not controlled by the
peripheral or host designer.
The IMP5226 can be placed in a sleep mode with a high logic signal. In
the sleep mode the outputs are in a high impedance state. Quiescent cur-
rent is less than 150µA when disabled.
The IMP5226 is a superior pin-for-pin replacement for the LX5226,
LX5207, UC5601/5602 and the UCC5610.
Key Features
x
Ultra-Fast response for Fast-20 SCSI
x
35MHz channel bandwidth
x
Sleep-mode current less than 150µA
— Disconnects terminator from lows
x
NO external compensation capacitors
x
Compatible with active negation drivers
x
Compatible with passive and active terminations
x
Approved for use with SCSI 1, 2, 3 and
Ultra SCSI
x
Hot-swap compatible
x
Pin-for-pin compatible with LX5226, LX5207
and UCC5610
IMP SCSI Terminators
Part
IMP5111
IMP5112
IMP5115
IMP5121
IMP5218
IMP5219
IMP5225
IMP5226
IMP5241
IMP5242
Channels
9
9
9
27
9
9
18
18
8
8
Type
SE
SE
SE
SE
SE
SE
SE
SE
SE/LVD
SE/LVD
5226_t06.eps
Block Diagrams
Term Power
Thermal
Limiting
Circuit
V
TERM
Current
Biasing
Circuit
24mA Current
Limiting Circuit
DATA OUTPUT
PIN DB (0)
2.85V
DISCONNECT
–
1 of 18 Channels
+
1.4V
5226_01.eps
IMP5226
1
Pin Configuration
SOWB-28
DISCONNECT
T1
T2
T3
T4
T5
HEAT SINK / GND
GND
HEAT SINK / GND
1
2
3
4
5
6
7
8
9
IMP5226
28 GND
27 T18
26 T17
25 T16
24 T15
23 T14
22 HEAT SINK / GND
21 HEAT SINK / GND
20 HEAT SINK / GND
19 T13
18 T12
17 T11
16 T10
15 NC
5226_02a.eps
SSOP-28
DISCONNECT
T1
T2
T3
T4
T5
HEAT SINK / GND
GND
HEAT SINK / GND
1
2
3
4
5
6
7
8
9
IMP5226
28 GND
27 T18
26 T17
25 T16
24 T15
23 T14
22 HEAT SINK / GND
21 HEAT SINK / GND
20 HEAT SINK / GND
19 T13
18 T12
17 T11
16 T10
15 NC
5226_02b.eps
T6 10
T7 11
T8 12
T9 13
V
TERM
14
DWP Package
T6 10
T7 11
T8 12
T9 13
V
TERM
14
DB Package
Ordering Information
Part Number
IMP5226CDWP
IMP5226CDWPT
IMP5226CDB
IMP5226CDBT
Temperature Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
Package
28-pin Plastic SOWB
Tape and Reel, 28-pin Plastic SOWB
28-pin Plastic SSOP
Tape and Reel, 28-pin Plastic SSOP
5226_t01.at3
Absolute Maximum Ratings
1
TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to +7V
Operating Junction Temperature . . . . . . . . . . 150°C
Storage Temperature Range . . . . . . . . . . . . . . –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300°C
Note:
1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Thermal Data
DWP Package
Thermal Resistance Junction-to-Leads,
θ
JL
. . . . . . . . 18°C/W
Thermal Resistance Junction-to-Ambient,
θ
JA
. . . . . . 40°C/W
DB Package
Thermal Resistance Junction-to-Ambient,
θ
JA
. . . . . . 117°C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
θ
JA
).
The
θ
JA
numbers are guidelines for the thermal performance of the
device/pc-board system. All of the ambient airflow is assumed.
2
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP5226
1
Recommended Operating Conditions
Parameter
Termpwr Voltage
Signal Line Voltage
Disconnect Input Voltage
Operating Junction Temperature Range – IMP5226C
Symbol
V
TERM
Min
4.0
0
0
0
Typ
Max
5.5
5.0
V
TERM
125
Units
V
V
V
°C
5226_t02.eps
Note:
2. Recommended operating conditions indicate the range over which the device is functional.
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of T
A
=
25°C. TermPwr = 4.75V. Low duty cycle
pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.
Parameter
Output High Voltage
TermPwr Supply Current
Symbol Conditions
V
OUT
I
CC
All data lines = Open
All data lines = 0.2V
DISCONNECT Pins > 2.0V
Min
2.65
Typ
2.85
10
424
50
Max
15
450
150
–24
–10
1
Units
V
mA
µA
mA
µA
µA
MHz
mA
5226_t03.eps
Output Current
Disconnect Input Current
Output Leakage Current
Channel Bandwidth
Termination Sink Current, per Channel
I
OUT
I
IN
I
OL
BW
I
SINK
V
OUT
= 0.5V
DISCONNECT Pins = 0V
DISCONNECT Pins > 2.0V, V
O
= 0.2V
–20
–22
35
V
OUT
= 4V
7
© 2000 IMP, Inc.
Data Communications
3
IMP5226
1
Application Information
Figure 1. Receiving Waveform – 20MHz
Figure 2. Driving Waveform – 20MHz
Receiver
1 Meter, AWG 28
DISCONNECT
IMP5226
Driver
IMP5226
DISCONNECT
5226_03.eps
Figure 3.
4
408-432-9100/www.impweb.com
© 2000 IMP, Inc.
IMP5226
1
Application Information
Cable transmission theory suggests to optimize signal speed and
quality, the termination should act both as an ideal voltage refer-
ence when the line is released (deasserted) and as an ideal
current source when the line is active (asserted). Common active
terminators which consist of linear regulators in series with resis-
tors (typically 110Ω) are a compromise. With coventional linear
terminators as the line voltage increases the amount of current
decreases linearly by the equation;
Acting as a near ideal line terminator, the IMP5226 closely repro-
duces the optimum case when the device is enabled. To enable
the device the disconnect pin is pulled LOW. During this mode
of operation, quiescent current is 10mA, and the device will
respond to line demands by delivering 24mA on assertion and by
imposing 2.85V on deassertion.
In order to disable the device, the disconnect pin must be driven
HIGH In the disable mode, the device is in a sleep state with
quiescent current less than 150µA. When disabled, all
outputs are in a high impedance state. Sleep mode can be used
for power conservation or to remove the terminator from the
SCSI chain.
An additional feature of the IMP5226 is its compatibility with
active negation drivers.
(
V
REF
−
V
LINE
)
=
I.
R
The IMP5226, with its unique new architecture, applies the max-
imum amount of current regardless of line voltage until the
termination high threshold (2.85V) is reached.
Table 1. Power Up/ Power Down Function Table
DISCONNECT
L
H
Open
Outputs
Enabled
HI Z
HI Z
Maximum Quiescent
Current
15mA
150µA
150µA
5226_t04.eps
© 2000 IMP, Inc.
Data Communications
5
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