M378T5663QH3-CF7 datasheet, PDF

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M378T5663QH3-CF7: DescriptionDDR DRAM Module, 256MX64, 0.4ns, CMOS, ROHS COMPLIANT, UDIMM-240; Categorystorage storage; File Size3MB，25 Pages; ManufacturerSAMSUNG; Websitehttp://www.samsung.com/Products/Semiconductor/; Environmental Compliance

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M378T5663QH3-CF7 Overview

DDR DRAM Module, 256MX64, 0.4ns, CMOS, ROHS COMPLIANT, UDIMM-240

M378T5663QH3-CF7 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SAMSUNG
Parts packaging code	DIMM
package instruction	DIMM, DIMM240,40
Contacts	240
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	0.4 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	400 MHz
I/O type	COMMON
JESD-30 code	R-XDMA-N240
memory density	17179869184 bit
Memory IC Type	DDR DRAM MODULE
memory width	64
Humidity sensitivity level	3
Number of functions	1
Number of ports	1
Number of terminals	240
word count	268435456 words
character code	256000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	95 °C
Minimum operating temperature
organize	256MX64
Output characteristics	3-STATE
Package body material	UNSPECIFIED
encapsulated code	DIMM
Encapsulate equivalent code	DIMM240,40
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Peak Reflow Temperature (Celsius)	260
power supply	1.8 V
Certification status	Not Qualified
refresh cycle	8192
self refresh	YES
Maximum standby current	0.24 A
Maximum slew rate	2.28 mA
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal pitch	1 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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UDIMM

DDR2 SDRAM

DDR2 Unbuffered SDRAM MODULE

240pin Unbuffered Module based on 1Gb Q-die

64/72-bit Non-ECC/ECC

60FBGA & 84FBGA with Lead-Free and Halogen-Free

(RoHS compliant)

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,

AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY.

ALL INFORMATION IN THIS DOCUMENT IS PROVIDED

ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar

applications where Product failure could result in loss of life or personal or physical harm, or any military or

defense application, or any governmental procurement to which special terms or provisions may apply.

* Samsung Electronics reserves the right to change products or specification without notice.

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Rev. 1.31 December 2008

UDIMM

Table of Contents

DDR2 SDRAM

1.0 DDR2 Unbuffered DIMM Ordering Information ..........................................................................4

2.0 Features .........................................................................................................................................4

3.0 Address Configuration .................................................................................................................4

4.0 x64 DIMM Pin Configurations (Front side/Back side) ................................................................5

5.0 x72 DIMM Pin Configurations (Front side/Back side) ................................................................6

6.0 Pin Description ..............................................................................................................................6

7.0 Input/Output Function Description .............................................................................................7

8.0 Functional Block Diagram : .........................................................................................................8

8.1 1GB, 128Mx64 Module - M378T2863QZ(H)S

......................................................................................8

8.2 1GB, 128Mx72 ECC Module - M391T2863QZ(H)3

................................................................................9

8.3 2GB, 256Mx64 Module - M378T5663QZ(H)3

.....................................................................................10

8.4 2GB, 256Mx72 ECC Module - M391T5663QZ(H)3

..............................................................................11

8.5 512MB, 64Mx64 Module - M378T6464QZ(H)3

...................................................................................12

9.0 Absolute Maximum DC Ratings .................................................................................................13

10.0 AC & DC Operating Conditions ...............................................................................................13

....................................................................13

10.2 Operating Temperature Condition

................................................................................................14

10.3 Input DC Logic Level

..................................................................................................................14

10.4 Input AC Logic Level

..................................................................................................................14

10.5 AC Input Test Conditions

............................................................................................................14

11.0 IDD Specification Parameters Definition ................................................................................15

12.0 Operating Current Table : .........................................................................................................16

12.1 M378T2863QZ(H)S : 1GB(128Mx8 *8) Module

................................................................................16

12.2 M378T5663QZ(H)3 : 2GB(128Mx8 *16) Module

..............................................................................16

12.3 M391T2863QZ(H)3 : 1GB(128Mx8 *9) ECC Module

..........................................................................17

12.4 M391T5663QZ(H)3 : 2GB(128Mx8 *18) ECC Module

........................................................................17

10.1 Recommended DC Operating Conditions (SSTL - 1.8)

.............................................................................18

13.0 Input/Output Capacitance ........................................................................................................19

14.0 Electrical Characteristics & AC Timing for DDR2-800/667 ....................................................19

12.5 M378T6464QZ(H)3 : 512MB(64Mx16 *4) Module

.........................................................................................19

14.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin

..............................................19

14.3 Timing Parameters by Speed Grade

.............................................................................................20

15.0 Physical Dimensions : ..............................................................................................................22

15.1 128Mbx8 based 128Mx64 Module (1 Rank)

....................................................................................22

15.2 128Mbx8 based 128M x72 Module (1 Rank)

...................................................................................23

15.3 128Mbx8 based 256Mx64/x72 Module (2 Ranks)

.............................................................................24

15.4 64Mbx16 based 64Mx64 Module (1 Rank)

......................................................................................25

14.1 Refresh Parameters by Device Density

2 of 25

Rev. 1.31 December 2008

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