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WME128K8-140DEM

Description
EEPROM, 128KX8, 140ns, Parallel, CMOS, CDSO32, 0.400 INCH, HERMETIC SEALED, CERAMIC, SOJ-32
Categorystorage    storage   
File Size320KB,11 Pages
ManufacturerMercury Systems Inc
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WME128K8-140DEM Overview

EEPROM, 128KX8, 140ns, Parallel, CMOS, CDSO32, 0.400 INCH, HERMETIC SEALED, CERAMIC, SOJ-32

WME128K8-140DEM Parametric

Parameter NameAttribute value
MakerMercury Systems Inc
package instruction0.400 INCH, HERMETIC SEALED, CERAMIC, SOJ-32
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
Maximum access time140 ns
Other featuresHARDWARE AND SOFTWARE DATA PROTECTION
JESD-30 codeR-CDSO-J32
JESD-609 codee4
memory density1048576 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programming voltage5 V
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formJ BEND
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.23 mm
Maximum write cycle time (tWC)10 ms
Base Number Matches1
White Electronic Designs
WME128K8-XXX
128Kx8 CMOS MONOLITHIC EEPROM, SMD 5962-96796
FEATURES
Read Access Times of 125, 140, 150, 200, 250,
300ns
JEDEC Approved Packages
• 32 pin, Hermetic Ceramic, 0.600" DIP
(Package 300)
• 32 lead, Hermetic Ceramic, 0.400" SOJ
(Package 101)
Commercial, Industrial and Military Temperature
Ranges
MIL-STD-883 Compliant Devices Available
Write Endurance 10,000 Cycles
Data Retention at 25°C, 10 Years
Low Power CMOS Operation
Automatic Page Write Operation
• Internal Address and Data Latches for 128 Bytes
• Internal Control Timer
Page Write Cycle Time 10ms Max.
Data Polling for End of Write Detection
Hardware and Software Data Protection
TTL Compatible Inputs and Outputs
This product is subject to change without notice.
FIGURE 1 –
Pin Configuration
32 DIP
32 CSOJ
Top View
NC
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
Pin Description
A0-16
I/O0-7
CS#
OE#
WE#
V
CC
V
SS
Address Inputs
Data Input/Output
Chip Selects
Output Enable
Write Enable
+5.0v Power
Ground
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
WE#
NC
A14
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
January 2008
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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