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TWL1103
VOICE-BAND AUDIO PROCESSOR (VBAP)
SLWS108A – JULY 2000 – JANUARY 2001
D
D
D
D
D
2.7-V Operation
Two Differential Microphone Inputs, One
Differential Earphone Output, and One
Single-Ended Earphone Output
Programmable Gain Amplifiers for
Transmit, Receive, Sidetone, and Volume
Control
Earphone Mute and Microphone Mute
On-Chip I
2
C Bus, Which Provides a Simple,
Standard, Two-Wire Serial Interface With
Digital ICs
D
D
D
D
D
Programmable for 15-Bit Linear Data or
8-Bit Companded (µ-Law or A-Law) Data
Available in a 32-Pin Thin Quad Flatpack
(TQFP) Package and an 80-Pin GQE
MicroStar Junior
t
Ball Grid Array (BGA)
Designed for Analog and Digital Wireless
Handsets and Telecommunications
Applications
Dual-Tone Multifrequency (DTMF) and
Single Tone Generator
Pulse Density Modulated (PDM) Buzzer
Output
description
The voice-band audio processor (VBAP) is designed to perform transmit encoding analog/digital (A/D)
conversion, receive decoding digital/analog (D/A) conversion, and transmit and receive filtering for voice-band
communications systems. The device operates in either the 15-bit linear or 8-bit companded
(µ-law
or A-Law)
mode, which is selectable through the I
2
C interface. The VBAP generates its own internal clocks from a
2.048-MHz master clock input.
PBS PACKAGE
(TOP VIEW)
24 23 22 21 20 19 18 17
PLLVSS
VSS
MCLK
RESET
PWRUPSEL
BUZZCON
PCMSYN
PCMCLK
PLLV
DD
EARV
SS
EAR1ON
EARV
DD
EAR1OP
EARV
SS
EAR2O
AV
DD
25
26
27
28
29
30
31
32
1
2
3
4 5 6 7
8
16
15
14
13
12
11
10
9
PCMO
PCMI
DV
SS
DV
DD
SCL
SDA
NC
NC
NC – No internal connection
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,
Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated
voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device
should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,
preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication
Guidelines for
Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies
available from Texas Instruments.
MicroStar Junior and VBAP are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
MBIAS
MIC1P
MIC1N
MIC2P
MIC2N
REXT
NC
AVSS
Copyright
2001, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
1
TWL1103
VOICE-BAND AUDIO PROCESSOR (VBAP)
SLWS108A – JULY 2000 – JANUARY 2001
functional block diagram
PCMO (16)
EAR1OP (29) EAR1ON (27) EAR2O (31)
BUZZCON (19)
Ear
Amp1
Ear
Amp2
PWRUPSEL (20)
V SS
AV DD
AV SS
Power
and
RESET
DV DD
DV SS
(23)
(32)
(8)
(13)
(14)
Digital
Modulator
and Filter
Buzzer
Control
PLLV DD (25)
PLLV SS (24)
RX Filter
and PGA
g = –6 dB
to +6 dB
EARV DD (28)
EARV SS (30, 26)
RESET
(21)
RX
Volume Control
g = –18 dB
to 0 dB
PLL
PCM
Interface
Sidetone
g = –24 dB
to
–12 dB
DTMF
Generator
TX Filter
and PGA
g = –10 dB
to 0 dB
REXT (6)
MBIAS (1)
MCLK (22)
REF
Analog
Modulator
Control Bus
MIC
Amplifier 2
g = 12 dB
or 0 dB
I 2C
I/F
SDA
SCL
(11)
(12)
MIC
Amplifier
1g =
23.5 dB
PCMCLK (17)
PCMI (15)
PCMSYN (18)
MIC1P (2)
MIC1N (3)
MIC2P (4)
MIC2N (5)
2
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
TWL1103
VOICE-BAND AUDIO PROCESSOR (VBAP)
SLWS108A – JULY 2000 – JANUARY 2001
functional description
power on/reset
The power for the various digital and analog circuits is separated to improve the noise performance of the
device. An external reset must be applied to the active low RESET terminal to guarantee reset upon power on.
After the initial power-on sequence the TWL1103 can be functionally powered up and down by writing to the
power control register through the I
2
C interface. There is a hardwired selectable power-up terminal in default
mode option. The PWRUPSEL function allows the VBAP to power up in the default mode and allows use without
a microcontroller.
reference
A precision band gap reference voltage is generated internally and supplies all required voltage references to
operate the transmit and receive channels. The reference system also supplies bias voltage for use with an
electret microphone at terminal MBIAS. An external precision resistor is required for reference current setting
at terminal REXT.
control interface
The I
2
C interface is a two-wire bidirectional serial interface that controls the VBAP by writing data to the six
control registers:
D
D
D
D
D
D
D
D
Power control
Mode control
Transmit PGA and sidetone control
Receive PGA gain and volume control
DTMF high tone
DTMF low tone
There are two power-up modes which may be selected at the PWRUPSEL terminal:
The PWRUPSEL state (V
DD
at terminal 20) causes the device to power up in the default mode when power
is applied. In the default mode, the I
2
C interface is not required, and the device may be used without an I
2
C
interface. The programmable functions are fixed in the default modes.
The PWRUPSEL state (ground at terminal 20) causes the device to go to a power-down state when power
is applied. In this mode an I
2
C interface is required to power up the device.
phase-locked loop
The internal digital filters and modulators require a 10.24-MHz clock that is generated by phase locking to the
2.048-MHz master clock input.
PCM interface
The PCM interface transmits and receives data at the PCMO and PCMI terminals respectively. The data is
transmitted or received at the PCMCLK speed once every PCMSYN cycle. The PCMCLK can be tied directly
to the 2.048-MHz master clock (MCLK). The PCMSYN can be driven by an external source or derived from the
master clock and used as an interrupt to the host controller.
microphone amplifiers
The microphone input is a switchable interface for two differential microphone inputs. The first stage is a low-
noise differential amplifier that provides a gain of 23.5 dB. The second stage amplifier has a selectable gain of
0 dB or 12 dB.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
3
TWL1103
VOICE-BAND AUDIO PROCESSOR (VBAP)
SLWS108A – JULY 2000 – JANUARY 2001
functional description (continued)
analog modulator
The transmit channel modulator is a third-order sigma-delta design.
transmit filter and PGA
The transmit filter is a digital filter designed to meet CCITT G.714 requirements. The device operates in either
the 15-bit linear or 8-bit companded
µ-law
or A-law mode that is selectable through the I
2
C interface. The
transmit PGA defaults to 0 dB.
sidetone
A portion of the transmitted audio is attenuated and fed back to the receive channel through the sidetone path.
The sidetone path defaults to –12 dB. The sidetone path can be enabled by writing to the power control register.
receive volume control
The receive volume control block acts as an attenuator with a range of –18 dB to 0 dB in 2 dB steps for control
of the receive channel volume. The receive volume control gain defaults to 0 dB.
receive filter and PGA
The receive filter is a digital filter that meets CCITT G.714 requirements with a high-pass filter that is selectable
through the I
2
C interface. The device operates in either the 15-bit linear or 8-bit
µ-law
or A-law companded
mode, which is selectable through the I
2
C interface. The gain defaults to –1 dB representing a 3-dBm0 level
for a 32-Ω load impedance and the corresponding digital full scale PCMI code. The gain may be set to –2 dB
for the respective 3-dBm0 level for a 16-
Ω
load impedance.
digital modulator and filter
The second-order digital modulator and filter convert the received digital PCM data to the analog output required
by the earphone interface.
earphone amplifiers
The analog signal can be routed to either of two earphone amplifiers, one with differential output (EAR1ON and
EAR1OP) and one with single-ended output (EAR2O). Clicks and pops are suppressed for EAR1 differential
output only.
tone generator
The tone generator provides generation of standard DTMF tones and single tone frequencies which are output
to the following devices: 1) The buzzer driver, as a pulse density modulation (PDM) signal 2) The receive path
digital/analog converter (DAC) for outputting through the earphone. There are 255 possible single tones. The
tone integer value is determined by the following formula:
Round (Tone Freq (Hz)/7.8135 Hz)
The value is loaded into one of two 8-bit registers, the high-tone register (04), or the low-tone register (05). The
tone output is 2 dB higher when applied to the high-tone register (04). When generating DTMF tones, the high
DTMF tone must be applied to the high-tone register and the low frequency tone to the low-tone register.
4
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
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