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FDC6324L_NL

Description
Buffer/Inverter Based Peripheral Driver, 1 Driver, NMOS, PDSO6, SOT-6
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size64KB,7 Pages
ManufacturerFairchild
Websitehttp://www.fairchildsemi.com/
Environmental Compliance
Download Datasheet Parametric View All

FDC6324L_NL Overview

Buffer/Inverter Based Peripheral Driver, 1 Driver, NMOS, PDSO6, SOT-6

FDC6324L_NL Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerFairchild
Parts packaging codeSOT-23
package instructionSOT-6
Contacts6
Reach Compliance Codenot_compliant
ECCN codeEAR99
Built-in protectionTRANSIENT
Number of drives1
Interface integrated circuit typeBUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 codeR-PDSO-G6
JESD-609 codee3
length2.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals6
Output current flow directionSOURCE
Package body materialPLASTIC/EPOXY
encapsulated codeLSSOP
Encapsulate equivalent codeTSOP6,.11,37
Package shapeRECTANGULAR
Package formSMALL OUTLINE, LOW PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply3/20 V
Certification statusNot Qualified
Maximum seat height1.22 mm
surface mountYES
technologyNMOS
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch0.95 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width1.6 mm
Base Number Matches1
March 1999
FDC6324L
Integrated Load Switch
General Description
These Integrated Load Switches are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance. These
devices are particularly suited for low voltage high side load
switch application where low conduction loss and ease of driving
are needed.
Features
V
DROP
=0.2V @ V
IN
=12V, I
L
=1A, V
ON/OFF
=1.5 to 8V
V
DROP
=0.3V @ V
IN
=5V, I
L
=1A, V
ON/OFF
=1.5 to 8V.
High density cell design for extremely low on-resistance.
V
ON/OFF
Zener protection for ESD ruggedness.
Body Model.
TM
>6KV Human
SuperSOT -6 package design using copper lead frame for superior
thermal and electrical capabilities.
SOT-23
SuperSOT
TM
-6
SuperSOT
TM
-8
SO-8
SOT-223
SOIC-16
Vin,R1
4
Q2
3
EQUIVALENT CIRCUIT
Vout,C1
ON/OFF
5
Q1
2
IN
Vout,C1
+
V
D R O P
-
OUT
ON/OFF
R1,C1
6
1
R2
pin
1
SuperSOT
TM
-6
See Application Circuit
Absolute Operating Range
Symbol
V
IN
V
ON/OFF
I
L
T
A
= 25°C unless otherwise noted
Parameter
Input Voltage Range
ON/OFF Voltage Range
Load Current @ V
DROP
=0.5V - Continuous
- Pulsed
(Note 1)
(Note 1 & 3)
(Note 2a)
FDC6324L
3 - 20
1.5 - 8
1.5
2.5
0.7
-55 to 150
6
Units
V
V
A
P
D
T
J
,T
STG
ESD
Maximum Power Dissipation
Operating and Storage Temperature Range
W
°C
kV
Electrostatic Discharge Rating MIL-STD-883D Human Body
Model (100pf/1500Ohm)
THERMAL CHARACTERISTICS
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 2a)
(Note 2)
180
60
°C/W
°C/W
© 1999 Fairchild Semiconductor Corporation
FDC6324L Rev. D

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