MT55L512Y36PT-10 datasheet, PDF

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MT55L512Y36PT-10: DescriptionZBT SRAM, 512KX36, 5ns, CMOS, PQFP100, PLASTIC, TQFP-100; Categorystorage storage; File Size787KB，37 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/

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MT55L512Y36PT-10 Overview

ZBT SRAM, 512KX36, 5ns, CMOS, PQFP100, PLASTIC, TQFP-100

MT55L512Y36PT-10 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Micron Technology
Parts packaging code	QFP
package instruction	PLASTIC, TQFP-100
Contacts	100
Reach Compliance Code	not_compliant
ECCN code	3A991.B.2.A
Maximum access time	5 ns
Other features	PIPELINED ARCHITECTURE
Maximum clock frequency (fCLK)	100 MHz
I/O type	COMMON
JESD-30 code	R-PQFP-G100
JESD-609 code	e0
length	20 mm
memory density	18874368 bit
Memory IC Type	ZBT SRAM
memory width	36
Number of functions	1
Number of terminals	100
word count	524288 words
character code	512000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	512KX36
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP100,.63X.87
Package shape	RECTANGULAR
Package form	FLATPACK, LOW PROFILE
Parallel/Serial	PARALLEL
power supply	2.5/3.3,3.3 V
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum standby current	0.03 A
Minimum standby current	3.14 V
Maximum slew rate	0.21 mA
Maximum supply voltage (Vsup)	3.465 V
Minimum supply voltage (Vsup)	3.135 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
width	14 mm
Base Number Matches	1

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0.16µm Process

ADVANCE

‡

18Mb: 1 MEG x 18, 512K x 32/36

PIPELINED ZBT SRAM

18Mb ZBT SRAM

FEATURES

•

High frequency and 100 percent bus utilization

Fast cycle times

Single +3.3V ±5% or +2.5V ±5% power supply (V

)

Separate +3.3V or +2.5V isolated output buffer sup-

ply (V

Advanced control logic for minimum control signal

interface

Individual BYTE WRITE controls may be tied LOW

Single R/W# (read/write) control pin

CKE# pin to enable clock and suspend operations

Three chip enables for simple depth expansion

Clock-controlled and registered addresses, data

I/Os, and control signals

Internally self-timed, fully coherent WRITE

Internally self-timed, registered outputs to elimi-

nate the need to control OE#

SNOOZE MODE for reduced-power standby

Common data inputs and data outputs

Linear or Interleaved Burst Modes

Burst feature (optional)

Pin and ball/function compatibility with 2Mb, 4Mb,

and 8Mb ZBT SRAM

MT55L1MY18P, MT55V1MV18P,

MT55L512Y32P, MT55V512V32P,

MT55L512Y36P, MT55V512V36P

3.3V V

, 3.3V or 2.5V I/O; 2.5V V

, 2.5V I/O

100-Pin TQFP

165-Ball FBGA

1. JEDEC Standard MS-025 BHA (LQFP).

2. JEDEC Standard MS-216 (Var. CAB-1)

OPTIONS

TQFP

MARKING

OPTIONS

• Packages

100-pin TQFP

165-ball FBGA

• Operating Temperature Range

Commercial (+10°C

≤

+110°C)

TQFP

MARKING

• Timing (Access/Cycle/MHz)

3.3V V

, 3.3V, or 2.5V I/O, and + 2.5V V

, 2.5 V I/O

3ns/5ns/200 MHz

-5

3.5ns/6ns/166 MHz

-6

4.2ns/7.5ns/133 MHz

-7.5

5ns/10ns/100 MHz

-10

• Configurations

3.3V V

, 3.3V, or 2.5V I/O

1 Meg x 18

MT55L1MY18P

512K x 32

MT55L512Y32P

512K x 36

MT55L512Y36P

2.5V V

, 2.5V I/O

1 Meg x 18

MT55V1MV18P

512K x 32

MT55V512V32P

512K x 36

MT55V512V36P

None

* A Part Marking Guide for the FBGA devices can be found on Micron’s

Web site—http://www.micron.com/numberguide.

Part Number Example:

MT55L512Y36PT-10

18Mb: 1 Meg x 18, 512K x 32/36 Pipelined ZBT SRAM

MT55L1MY18P_16_A.fm - Rev A; Pub 6/02

Micron Technology, Inc., reserves the right to change products or specifications without notice.

‡

PRODUCTS

AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND ARE SUBJECT TO CHANGE BY

MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.

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