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LTC2355IMSE-12TRPBF

Description
Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown
File Size267KB,18 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC2355IMSE-12TRPBF Overview

Serial 12-Bit/14-Bit, 3.5Msps Sampling ADCs with Shutdown

LTC2355-12/LTC2355-14
Serial 12-Bit/14-Bit, 3.5Msps
Sampling ADCs with Shutdown
Features
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Description
The LTC
®
2355-12/LTC2355-14 are 12-bit/14-bit, 3.5Msps
serial ADCs with differential inputs. The devices draw
only 5.5mA from a single 3.3V supply and come in a
tiny 10-lead MSOP package. A Sleep shutdown feature
further reduces power consumption to 13µW. The com-
bination of speed, low power and tiny package makes the
LTC2355-12/LTC2355-14 suitable for high speed, portable
applications.
The 80dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert 0V to 2.5V unipolar inputs differentially.
The absolute voltage swing for A
IN+
and A
IN–
extends from
ground to the supply voltage.
The serial interface sends out the conversion results during
the 16 clock cycles following a CONV rising edge for com-
patibility with standard serial interfaces. If two additional
clock cycles for acquisition time are allowed after the data
stream in between conversions, the full sampling rate of
3.5Msps can be achieved with a 63MHz clock.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
3.5Msps Conversion Rate
74.2dB SINAD at 14-Bits, 71.1dB SINAD at 12-Bits
Low Power Dissipation: 18mW
3.3V Single Supply Operation
2.5V Internal Bandgap Reference can be Overdriven
3-Wire SPI-Compatible Serial Interface
Sleep (13µW) Shutdown Mode
Nap (4mW) Shutdown Mode
80dB Common Mode Rejection
0V to 2.5V Unipolar Input Range
Tiny 10-Lead MSOP Package
applications
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Communications
Data Acquisition Systems
Uninterrupted Power Supplies
Multiphase Motor Control
Multiplexed Data Acquisition
RFID
Block Diagram
10µF 3.3V
–50
V
DD
THREE-
STATE
SERIAL
OUTPUT
PORT
14
3
10µF
4
GND
5
6
V
REF
2.5V
REFERENCE
11
TIMING
LOGIC
9
EXPOSED PAD
SCK
2355 TA01
THD, 2nd, 3rd and SFDR
vs Input Frequency
–56
–62
8
SDO
THD, 2nd, 3rd (dB)
–68
–74
–80
–86
–92
–98
–104
–110
0.1
1
10
FREQUENCY (MHz)
100
2355 G02
LTC2355-14
A
IN+
A
IN–
1
7
14-BIT LATCH
+
S&H
14-BIT ADC
THD
2nd
3rd
2
10
CONV
2355fa


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