TECHNICAL NOTE
Power Supply IC Series for TFT-LCD Panels
Built-in 4-channel System Power Supply
+ Gamma Buffer Amp
BD8150KVT
Description
The BD8150KVT is a system power supply IC that offers a 4-channel power supply with 10 gamma correction output
channels and VCOM. The DC/DC block can be switched between step-up and step-down and supports both 5V and 12V
input.
Features
1) Multi-channel power supply with two DC/DC converter controller channels and two charge pump channels
2) 10channel gamma correction Buffer Amp output and 1channel VCOM
3) High reference voltage accuracy: ±1 %
4) Oscillating frequency: 1MHz
5) Built-in UVLO (Under Voltage Lockout) and output short-circuit protection circuits
6) Standby current of 0µA (Typ.)
7) Controllable start up sequence
8) TQFP64V package
Applications
Power supply for LCD monitors and LCD TVs
Absolute Maximum Ratings (Ta=25°C)
Parameter
Power supply voltage
Regulator power supply voltage
Driver power supply voltage
Junction temperature
Power dissipation
Operating temperature range
Storage temperature range
Symbol
V
CC
REGV
CC
PV
CC
Tjmax
Pd
Topr
Tstg
Rating
15
15
15
125
1000*1
−30
to 85
−55
to 150
Unit
V
V
V
°C
mW
°C
°C
*1 Derated at 10mW/°C at Ta>25°C when mounted on a 70.0 mm
×
70.0 mm
×
1.6 mm glass epoxy board
Operating Conditions (Ta=-30°C ~+85°C)
Parameter
Symbol
Power supply voltage
V
CC
Regulator power supply voltage
REGV
CC
Driver power supply voltage
PV
CC
Min.
2.7
4.5
2.7
Max.
13
14
13
Unit
V
V
V
Ver.B Oct.2005
Electrical Characteristics (Unless otherwise specified, V
CC
= 5 V, REGV
CC
= 12V, Ta = 25°C)
Limit
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
[ (1) DC/DC converter controller ERR AMP1, 2 ]
Input bias current
Ib12
−3
−0.1
3
µA INV = 0.5 V
Input offset voltage
Vos12
−10
0
10
mV
VFB = 1.25 V, INV = 0.5 V,
Output source current
Iesc12
−2
−0.7
−0.2
mA
NON = 2.5 V
VFB = 1.25 V, INV = 1.5 V,
Output sink current
Iesk12
0.1
0.3
1
mA
NON = 0 V
Input voltage range
VNON12
−0.1
−
V
CC
−1
V
Max. output voltage
Voh12
1.8
2.1
2.4
V IFB =
−0.1
mA
Min. output voltage
Vol12
0.6
0.8
1.0
V IFB = 0.1 mA
Feedback voltage
FB1
1.225
1.25
1.275
V ERRAMP1 only
[ (1) PWM and DRV ]
Output sink current
Ipsk12
70
130
200
mA GD1, 2 = 5 V
Output source current
Ipsc12
−245
−160
−85
mA GD1, 2 = 0 V
[ (1) UD Selector ]
High-side threshold voltage
Vudh
V
CC
×
0.7 V
CC
−
V Step-down operation
Low-side threshold voltage
Vudl
−
0
V
CC
×
0.3 V Step-up operation
[ (1) Detector 1, 2 ]
High-side threshold voltage 1
Vdeh12
0.9
1.0
1.1
V DET1, 2 L
→
H sweep up VINV
Low-side threshold voltage 1
Vdel12
0.6
0.7
0.8
V DET1, 2 H
→
L sweep down VINV
DET2 L
→
H,
High-side threshold voltage 2
Vdeh22
0.1
0.2
0.3
V
Inverting sweep down V
NON
DET2 H
→
L,
Low-side threshold voltage 2
Vdel22
0.4
0.5
0.6
V
Inverting sweep up V
NON
DET1 max. output voltage
Vdh1
4.8
5.0
−
V
DET1 min. output voltage
Vdl1
−
0
0.2
V
DET2 max. output voltage
Vdh2
4.8
5.0
−
V
DET2 min. output voltage
Vdl2
−
0
0.2
V
[ (1) Oscillator ]
Switching frequency
Fsw12
0.8
1.0
1.2
MHz
Frequency variation
Fc12
−
10
−
% V
CC
= 3 V to 13 V
[ (1) Soft start ]
Source current
Iscss
6
10
14
µA
Sink current
Iskss
0.5
1
2
mA CTL1, 2 = 0 V
[ (1) Timer latch ]
Source current
Isctl
6
10
14
µA SCP = 1.0 V
SCP threshold voltage
Vthscp
−
1.25
−
V
[ (1) DTC1 ]
Input bias current
Vdtc1
−3
−0.1
3
µA
High-side threshold voltage
VdtcH1
−
1.5
−
V On Duty = 0%
Low-side threshold voltage
VdtcL1
−
1.0
−
V On Duty = 100%
[ (1) DTC2 ]
Input bias current
Idtc2
−3
−0.1
3
µA
High-side threshold voltage
IdtcH2
−
1.5
−
V On Duty = 100%
Low-side threshold voltage
IdtcL2
−
1.0
−
V On Duty = 0%
[ (2) Charge pump driver ERR AMP3, 4 ]
FB3
1.212
1.25
1.288
V
Feedback voltage
FB4
−
0
−
V
Input bias current
Ib34
−3
−0.1
3
µA Buffer
I/O voltage difference
∆Vd34
−
0.2
0.5
V Io =
−10
mA
Output current capacity
Io34
−
−130
−50
mA VFB = 0 V
2/16
Electrical Characteristics (Unless otherwise specified, V
CC
= 5 V, REGV
CC
= 12 V, Ta = 25°C)
Limit
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
[ (2) Driver ]
Fsw34
200
250
300
kHz
Switching frequency
Fc34
−
10
−
% V
CC
= 3V to 13V
Frequency variation
[ (2) Detector ]
Vdeh3
0.9
1.0
1.1
V DET3 L
→
H, sweep up INV3
High-side threshold voltage
Vdeh4
0.1
0.2
0.3
V DET4 L
→
H, sweep down NON4
Vdel3
0.6
0.7
0.8
V DET3 H
→
L, sweep down NON3
Low-side threshold voltage
Vdel4
0.4
0.5
0.6
V DET4 H
→
L, sweep up NON4
Vdh3
4.8
5.0
−
V
DET3 min. output voltage
Vdl3
−
0
0.2
V
Vdh4
4.8
5.0
−
V
DET4 max. output voltage
Vdl4
−
0
0.2
V
[ (3) Low-dropout regulator]
FBR
1.237
1.25
1.263
V Buffer, Io =
−10mA
Feedback voltage
Ibr
−3
−0.1
3
µA Buffer
Input bias current
∆Vdr
−
0.2
0.5
V Io =
−10mA
I/O voltage difference
Io
−
−130
−50
mA V
REG
= 0V
Output current capacity
RegI
−
1
10
mV REGV
CC
= 4.5V to 14V
Input stability
RegL
−
1
10
mV Io = 1mA
→
10mA
Load stability
RR
35
50
−
dB f = 120Hz
Ripple rejection ratio
[ (4) Buffer Amp ]
−10
0
10
mV
Voso
Input offset voltage
−3
−0.1
3
µA IN+ = 6V
Ibo
Input bias current
Ioo
20
50
−
mA
Driver current
∆Vo
−
1
10
mV Io = +1mA to
−1mA
Load stability
SRo
−
2
−
V/µs
Slew rate
REGV
CC
−
REGV
CC
−
V Io =
−1mA,
IN+ = REGV
CC
Voho
Max. output current
−
0.8
1.0
−
0.1
0.16
V Io = 1mA, IN+ = 0V
Vohl
Min. output current
[ (5) Overall BG ]
Vref
1.225
1.250
1.275
V Io =
−0.1mA
BG output voltage
∆Vi
−
5
20
mV V
CC
= 3V to 13V
Input stability
∆Vl
−
1
10
mV Io = 0mA
→
0.1mA
Load stability
Iovr
0.2
1
−
mA BG = 0V
Output current capacity
[ VREF17 ]
Vref17
1.666
1.700
1.734
V Io =
−0.1mA
VREF17 output voltage
∆Vi17
−
5
20
mV V
CC
= 3V to 13V
Input stability
∆Vl17
−
1
10
mV Io = 0mA
→
0.1mA
Load stability
Iovr17
0.2
1
−
mA VREF17 = 0V
Output current capacity
[ (5)CTL1 to CTL4 ]
High-side threshold voltage
Vcth
V
CC
×
0.7
V
CC
−
V Circuit active
Low-side threshold voltage
Vctl
−
0
V
CC
×
0.3 V Circuit off
[ (5) Under-voltage lockout protection ]
Threshold voltage
Vuvlo
2.327
2.45
2.573
V
Hysteresis
Hys
−
0.1
−
V
[ (5)Total supply current ]
Standby current
Istb
−
0
10
µA
Average consumption current
Icc
1.1
2
2.9
mA
[ (5)All ENABLE ]
Sink current
Ies
2
4
8
mA ENABLE = 5V
[ (5)PG ]
Source current
Igso
1.2
2.5
5
mA CTL1 = CTL2 = 0V, PG = 2.5V
Sink current
Igsi
2
5
8
µA CTL1 = 5V, PG = 2.5V
* This product is not designed for protection against radio active rays.
3/16
Electrical Characteristics Curves (Unless otherwise specified, Ta = 25°C)
10
1
20
7.5
25
℃
-40
℃
125
℃
0.8
IENBLE [mA]
]
15
ICC [mA]
5
ICC [uA]
0.6
10
0.4
2.5
0.2
5
0
0
4
8
12
16
0
0
4
8
12
16
0
0
4
8
VENBLE [V]
12
16
Vcc[V]
VCC [V]
Fig. 1 Total Supply Current
1.27
10
Vcc[V]
VCC [V]
Fig. 2 Standby Current
5
Fig. 3 ENB Pin Current
1.26
VREG [V]
8
4
1.25
IPG [uA]
IPG[mA]
6
3
4
2
1.24
2
1
1.23
-40
0
0
0
40
Ta [
℃
]
80
120
0
1
2
VPG [V]
3
4
5
0
1
2
VPG [V]
3
4
5
Fig. 4 VREG Voltage vs Temperature
Fig. 5 PG Pin Sinking Current
Fig. 6 PG Pin Source Current
6
4
6
16
4.5
12
2
VOS [mV]
FB[V]
0
-2
-4
-6
0.75
125
℃
25
25
℃
-40
℃
3
Vo[V]
8
1.5
4
0
0.85
0.95
1.05
1.15
1.25
0
1
2
TIME [µS]
3
4
0
0
40
80
120
160
V
IN
[V]
Io[mA]
VCC [V]
Fig. 9 Regulator Output Current Capacity
Fig. 7 Error Amp Offset Voltage
Fig. 8 Error Amp Slew Rate Waveform
Electrical Characteristics Curves (Unless otherwise specified, Ta = 25°C)
150
150
300
120
125
℃
120
25
℃
-40
℃
240
CD freq[kHz]
VOL[mV]
VOH[V]
90
90
125
25
℃
-40
℃
180
60
60
120
125
℃
60
25
℃
-40
℃
30
30
0
0
4
8
RegVcc [V]
12
16
0
0
4
8
RegVcc [V]
12
16
0
2
5.5
9
RegVcc [V]
12.5
16
Fig. 10 Charge Pump
PMOS On Resistance
Fig. 11 Charge Pump
NMOS On Resistance
Fig. 12 Charge Pump
Switching Frequency
4/16
10
10
4
7.5
VDET1[V]
VDET4[V]
7.5
2
VOS[mV]
5
5
0
2.5
2.5
-2
0
0
1
2
Vcc [V]
3
4
5
0
0
0.25
0.5
Vcc [V]
0.75
1
-4
0
2.8
5.6
V
IN
[V]
8.4
11.2
Fig. 13 Detectors 1 to 3
Threshold Voltage
12
Fig. 14 Detector 4
Threshold Voltage
100
Fig. 15 Buffer Amp
Offset Voltage
180
180
PHASE
144
144
108
108
72
72
9
GAIN [dB]
60
VO[V]
6
GAIN
0
0
-20
-36
-36
-72
-72
-108
-108
-144
-144
3
1V
1µs
-60
0
-60
-38
-16
IO [mA]
6
28
50
|
Fig. 17 Buffer Amp
Slew Rate Waveform
-180
-100
-180
1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0
3
4
5
6
7
8
2
f [Hz]
Fig. 16 Buffer Amp
Output current capacity
Fig.18 Buffer Amp
Open Loop
Pinout Diagram
Block Diagram
Vcc
VCC
51
BG
41
VREF
VREF17
PWM1
DTC1 59
DTC2 60
+
-
-
NON2
43
VREF17
42
OSC
CT
32
UDSEL1
59
UDSEL2
58
UVLO
50
49
PVCC
PVcc
GD1
1
Vcc
VCC
ERR1
+
-
+
-
GD2
PGND
GND
FB2
INV2
NON2
VREF17
BG
INV3
FB3
CD3
CD4
FB4
NON4
ENABLE
SCP
DET1
PG
54
52
FB1
1V
SS1 55
53
INV1
SOFTSTART
PWM2
-
+
+
GD1
PVCC
VCC
FB1
IVN1
PG
SS1
SS2
UDSEL1
UDSEL2
DTC1
DTC2
CTL4
CTL3
CTL2
CTL1
CT
INV5
VREG
REGVCC
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
COM
AMPGND
1
48
47
GD2
PGND
SS2 56
SOFTSTART
ERR2
CTL1 61
CTL2 62
CTL3 63
CTL4 64
DET2
+
-
+
-
45
FB2
1V
44
INV2
TIMERLATCH
REG 29
Vcc
VCC
REG
VREG
30
+
-
33 SCP
1
2
3
4
DET1
DET2
DET3
DET4
INV5
GND
31
46
2BitCOUNTER
34
ENABLE
DET1
DET2
DET3
DET4
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN+
IN-
CD4
37
LV SHIFT
LV SHIFT
38
CD3
FB4
36
ERR4
-
+
-
+
DET4
DET3
+
-
+
-
39
ERR3
40
17
5
FB3
NON4 35
IN-
IN+
COM
16
15
18
+
-
INV3
AMPGND
IN0
OUT0
0.2V
1V
AMPVcc
AMPVCC
+
-
28
19
OUT9
14
IN9
20
OUT8
13
IN8
21
OUT7
12
IN7
22
OUT6
11
IN6
23
OUT5
10
IN5
24
OUT4
9
IN4
25
OUT3
8
IN3
26
OUT2
7
IN2
27
OUT1
6
IN1
Fig. 19 BD8150KVT Pin Assignment Diagram and Block Diagram
5/16
PHA [deg]
20
36
36
U/D SELECTER
U/D SELECTER
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
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