KS8993M / KS8993MI
‡
Integrated 3-Ports 10/100 Managed Switch with PHY
Confidential Information
Overview
The KS8993M, a highly integrated layer-
2 managed switch, is designed for low
port count, cost-sensitive 10/100 Mbps
switch systems. It offers an extensive
feature set that includes tag/port-based
VLAN, QoS priority, management, MIB
counters, MII/SNI interface and CPU
control/data interfaces to effectively
address both current and emerging Fast
Ethernet applications.
Revision 1.02
The KS8993M contains two 10/100
transceivers with
patented mixed-signal
low-power technology,
three MAC
(Media Access Control) units, a high-
speed non-blocking switch fabric, a
dedicated address lookup engine, and
an on-chip frame buffer memory.
Both PHY units support 10BaseT and
100BaseTX. In addition, one of the PHY
unit supports 100BaseFX.
Auto
M DI/M DI-X
10/100
T/TX/FX
PHY 1
1K look-up
Engine
10/100
MAC 1
Queue
Managem ent
FIFO, Flow Control, VLAN Tagging ,Priority
Auto
M DI/M DI-X
10/100
T/TX
PHY 2
10/100
MAC 2
Buffer
Managem ent
M II / SNI
Interface
10/100
MAC 3
Fram e
Buffers
SNI
SPI
Interface
M IIM
Interface
SM I
Interface
I2C
Bus
P1 LED[3:0]
P2 LED[3:0]
LED
Drivers
SPI
MIB
Counters
Control
Registers
EEPROM
Interface
Strap In
Configuration Pins
KS8993M
Note: ‡ KS8993MI will be available from Q1 2004
Micrel, Inc. 1849 Fortune Drive, San Jose, CA 95131 U.S.A. http://www.Micrel.com
KS8993M (Integrated 3-Ports 10/100 Managed Switch with PHY)
Feature Highlights
•
Proven 2
nd
generation of Integrated 3-Ports 10/100 Ethernet Switch with
3 MACs and 2 PHYs fully compliant to IEEE 802.3u Standard
Non-blocking switch fabric assures fast packet delivery by utilizing an 1K
MAC Address lookup table and a store-and-forward architecture
Full duplex IEEE 802.3x flow control (Pause) with force mode option
Half duplex back pressure flow control
Automatic MDI / MDI-X crossover with disable and enable option
100BaseFX support on port 1
MII interface supports both MAC mode and PHY mode
7-wire SNI support for legacy MAC
Comprehensive LED Indicator support for link, activity, full/half duplex and
10/100 speed
•
Comprehensive Configuration Register access
Serial Management Interface (SMI) to all internal registers
NEW
MII Management (MIIM) Interface to PHY registers
SPI and I2C Interface to all internal registers
I/0 Pins Strapping and EEPROM to program selective registers in
unmanaged switch mode
Control registers configurable on the fly (port-priority, 802.1p/d/q, AN…)
•
QoS / CoS packets prioritization support
per-port, 802.1p and DiffServ based
Re-mapping of 802.1p priority field per-port basis
NEW
•
Advanced Switch Features
IEEE 802.1q VLAN support for up to 16 groups (full-range of VLAN ID)
Micrel, Inc.
Confidential Information
2
December 8, 2003
Revision 1.02
KS8993M (Integrated 3-Ports 10/100 Managed Switch with PHY)
VLAN ID tag/untag options, per-port basis
IEEE 802.1p/q tag insertion or removal on a per port basis (egress)
Programmable Rate Limiting from 0 to 100 Mbps at the ingress & egress
port, rate options for high & low priority, per port basis
Broadcast storm protection with % control (global & per-port basis)
IEEE 802.1d Spanning Tree Protocol support
Upstream Special Tagging Mode to inform the processor which ingress
port a packet is received on
IGMP v1/v2 Snooping support for multicast packet filtering
Double Tagging support
NEW
•
Switch Management Features:
Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port
or MII
MIB (Management Information Base) counters for fully compliant statistics
gathering, 34 MIB counters per port
Loop back modes for remote diagnostic of failure
•
Low Power Dissipation: < 0.8 Watts (includes PHY transmit drivers)
Full-chip hardware power-down (register configuration not saved)
Per-port based software power-save on PHY (idle link detection, register
configuration preserved)
0.18um CMOS technology
Voltages: Core 1.8V
I/O and Transceiver 3.3V or 2.5V
•
•
Industrial Temperature (available from Q1 2004)
128-pins PQFP Package
Micrel, Inc.
Confidential Information
3
December 8, 2003
Revision 1.02
KS8993M (Integrated 3-Ports 10/100 Managed Switch with PHY)
Applications
•
Universal Solutions
Broadband Gateway / Firewall / VPN
Integrated DSL or Cable Modem Multi-port Router
Wireless LAN Access Point + Gateway
Residential & Enterprise VoIP Gateway / Phone
Set-Top / Game Box
Home Networking Expansion
Standalone 10/100 Switch
FTTx Customer Premise Equipment
Fiber Broadband Gateway
•
Upgradeable Solutions
1
Unmanaged Switch with future option to migrate to a Managed Solution
Single PHY alternative with future expansion option for two ports
•
Industrial Solutions
Applications requiring port redundancy and port monitoring
Sensor Devices in Redundant Ring Topology
Note:
1
Save the cost and time of PCB re-spin
Micrel, Inc.
Confidential Information
4
December 8, 2003
Revision 1.02
KS8993M (Integrated 3-Ports 10/100 Managed Switch with PHY)
Revision History
Revision
1.00
1.01
1.02
Date
5/14/03
5/28/03
12/8/03
Summary of Changes
Initial Release
Added KS8993MI availability in Q4 2003
Changed VDDIO, VDDATX and VDDARX supply voltages
from 3.3V to (3.3V or 2.5V).
Changed [PS1,PS0] = [1,1] setting from Reserved to SMI mode.
Changed Special Tagging Mode to Upstream Special Tagging Mode
(Switch Port 3 to Processor support only).
Updated recommended magnetic manufacturer list.
Added 25 MHz crystal/oscillator clock’s ppm spec. in pin description.
Updated I2C Slave Serial Bus Configuration section.
Updated KS8993MI availability to from Q1 2004.
Micrel, Inc.
Confidential Information
5
December 8, 2003
Revision 1.02
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