CY7C1021D
1-Mbit (64 K × 16) Static RAM
1-Mbit (64 K × 16) Static RAM
Features
■
Functional Description
The CY7C1021D is a high performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected. The input and output pins (IO
0
through IO
15
) are placed in a high impedance state when the
device is deselected (CE HIGH), outputs are disabled (OE
HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during
a write operation (CE LOW and WE LOW).
Write to the device by taking Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (IO
0
through IO
7
), is written into the location
specified on the address pins (A
0
through A
15
). If Byte High
Enable (BHE) is LOW, then data from I/O pins (IO
8
through IO
15
)
is written into the location specified on the address pins (A
0
through A
15
).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on IO
0
to IO
7
. If
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
8
to IO
15
. See the
Truth Table on page 10
for a
complete description of read and write modes.
Temperature Ranges:
❐
Industrial: –40 °C to 85 °C
Pin and Function Compatible with CY7C1021B
High Speed
❐
t
AA
= 10 ns
Low Active Power
❐
I
CC
= 80 mA at 10 ns
Low CMOS Standby Power
❐
I
SB2
= 3 mA
2.0 V Data Retention
Automatic Power Down when Deselected
CMOS for Optimum Speed and Power
Independent Control of Upper and Lower Bits
Available in Pb-free 44-pin 400-Mil Wide Molded SOJ and
44-pin TSOP II Packages
■
■
■
■
■
■
■
■
■
Logic Block Diagram
DATA IN DRIVERS
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
64K x 16
RAM Array
SENSE AMPS
IO
0
–IO
7
IO
8
–IO
15
COLUMN DECODER
BHE
WE
CE
OE
BLE
A
8
A
9
A
10
A
11
A
12
A
13
A
14
A
15
Cypress Semiconductor Corporation
Document #: 38-05462 Rev. *J
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised June 7, 2011
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CY7C1021D
Contents
Pin Configuration ............................................................. 3
Selection Guide ................................................................ 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Switching Characteristics ................................................ 6
Data Retention Characteristics ....................................... 7
Data Retention Waveform ................................................ 7
Switching Waveforms ...................................................... 7
Truth Table ...................................................................... 10
Ordering Information ...................................................... 11
Ordering Code Definitions ......................................... 11
Package Diagrams .......................................................... 12
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC Solutions ......................................................... 16
Document #: 38-05462 Rev. *J
Page 2 of 16
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CY7C1021D
Pin Configuration
Figure 1. 44-pin SOJ / 44-pin TSOP II (Top View)
[1]
A
4
A
3
A
2
A
1
A
0
CE
IO
0
IO
1
IO
2
IO
3
V
CC
V
SS
IO
4
IO
5
IO
6
IO
7
WE
A
15
A
14
A
13
A
12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
5
A
6
A
7
OE
BHE
BLE
IO
15
IO
14
IO
13
IO
12
V
SS
V
CC
IO
11
IO
10
IO
9
IO
8
NC
A
8
A
9
A
10
A
11
NC
Selection Guide
Description
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
-10 (Industrial)
10
80
3
Unit
ns
mA
mA
Note
1. NC pins are not connected on the die.
Document #: 38-05462 Rev. *J
Page 3 of 16
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CY7C1021D
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ............................... –65
C
to +150
C
Ambient Temperature with
Power Applied ......................................... –55
C
to +125
C
Supply Voltage on
V
CC
to Relative GND
[2]
................................–0.5 V to +6.0 V
DC Voltage Applied to Outputs
in High Z State
[2]
................................ –0.5 V to V
CC
+ 0.5 V
DC Input Voltage
[2]
............................ –0.5 V to V
CC
+ 0.5 V
Current into Outputs (LOW) ........................................ 20 mA
Static Discharge Voltage ......................................... > 2001 V
(per MIL-STD-883, Method 3015)
Latch Up Current ................................................... > 200 mA
Operating Range
Range
Industrial
Ambient
Temperature
–40
C
to +85
C
V
CC
5 V
10%
Speed
10 ns
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
[2]
Input Leakage Current
Output Leakage Current
V
CC
Operating Supply Current
GND < V
I
< V
CC
GND < V
I
< V
CC
, Output Disabled
V
CC
= Max, I
OUT
= 0 mA,
f = f
max
= 1/t
RC
100 MHz
83 MHz
66 MHz
40 MHz
I
SB1
I
SB2
Automatic CE Power Down
Current —TTL Inputs
Automatic CE Power Down
Current —CMOS Inputs
Max V
CC
, CE > V
IH
, V
IN
> V
IH
or V
IN
< V
IL
, f = f
max
Max V
CC
, CE > V
CC
– 0.3 V, V
IN
> V
CC
– 0.3 V, or
V
IN
< 0.3 V, f = 0
I
OH
= –4.0 mA
I
OL
= 8.0 mA
Test Conditions
-10 (Industrial)
Min
2.4
–
2.2
0.5
1
1
–
–
–
–
–
–
Max
–
0.4
V
CC
+ 0.5 V
0.8
+1
+1
80
72
58
37
10
3
Unit
V
V
V
V
A
A
mA
mA
mA
mA
mA
mA
Note
2. V
IL
(min) = –2.0 V and V
IH
(max) = V
CC
+ 1 V for pulse durations of less than 5 ns.
Document #: 38-05462 Rev. *J
Page 4 of 16
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CY7C1021D
Capacitance
Parameter
[3]
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25C, f = 1 MHz, V
CC
= 5.0 V
Max
8
8
Unit
pF
pF
Thermal Resistance
Parameter
[3]
JA
JC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 3 × 4.5 inch, four-layer
printed circuit board
44-pin SOJ
59.52
36.75
44-pin TSOP II Unit
53.91
21.24
C/W
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms
[4]
Z = 50
OUTPUT
50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
1.5 V
3.0 V
ALL INPUT PULSES
90%
10%
90%
10%
30 pF*
GND
Rise Time:
3
ns
(a)
(b)
Fall Time:
3
ns
High-Z characteristics:
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
5 pF
R2
255
R1 480
(c)
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. AC characteristics (except High Z) are tested using the load conditions shown in
Figure 2
(a). High Z characteristics are tested for all speeds using the test load
shown in
Figure 2
(c).
Document #: 38-05462 Rev. *J
Page 5 of 16
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