ACE24(L)C02/04/08/16
Two-wire Serial EEPROM
Technology
Description
The ACE24(L)C02/04/08/16 provides 2048 / 4096 / 8192 / 16384 bits of serial electrically erasable and
programmable read-only memory (EEPROM) organized as 256/512/1024/2048 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power and low-voltage
operations are essential.
Features
Low Operation Voltage:
ACE24C02/04/08/16 : Vcc=2.2V to 5.5V
ACE24LC02/04/08/16 : Vcc=1.7V to 3.6V
Internally Organized: 266x/(2K), 512x8(4K), 1024x8(8K) or 204/x8(16K)
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
ACE24C02/04/08/16 :100kHz(2.2V) and 400kHz(5V) Compatibility
ACE24LC02/04/08/16 :1MHz (3.6V,2.7V,2.5V) and 400 kHz (1.7V) Compatibility
Write Protect Pin for Hardware Data Protection
8-byte Page(02), 16-byte Page (04,08,16) Write Modes
Partial Page Writes are Allowed
Self-timed Write Cycle (5 ms max)
High-reliability - Endurance: 1,000,000 Write Cycles
- Data Retention: 100 Years
PDIP-8,SOP-8,TSSOP-8 ROHS compliant Packages
Wafer Sales: available in inked wafer Form
Absolute Maximum Ratings
Operating Temperature
-55℃ to +125℃
Storage Temperature
-65℃ to +150℃
Voltage on Any Pin with Respect to Ground
-1.0V to +7.0V
Maximum Operating Voltage ACE24(L)C02/04/08/16
6.25V
DC Output Current
5.0 mA
*Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
VER 1.3
1
ACE24(L)C02/04/08/16
Two-wire Serial EEPROM
Technology
Packaging Type
Pin Configurations
Pin Name
A0~A2
SDA
SCL
WP
VCC
GND
Function
Device Address Inputs
Serial Data Input / Output
Serial Clock Input
Write Protect
Power Supply
Ground
VER 1.3
2
ACE24(L)C02/04/08/16
Two-wire Serial EEPROM
Technology
Block Diagram
Figure 1
VER 1.3
3
ACE24(L)C02/04/08/16
Two-wire Serial EEPROM
Technology
Ordering information
Selection Guide
ACE24(L)C02/04/08/16 XX
+
X H
Halogen-free
U : Tube
T : Tape and Reel
Pb - free
DP : PDIP-8
FM : SOP-8
TM : TSSOP-8
Serial Clock (SCL):
The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock
data out of each device.
Serial Data (SDA):
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses (A2, A1, A0):
The A2, A1 and A0 pins are device address inputs that are hard wired for the ACE24(L)C02, As many
as eight 2K devices may be addressed on a single bus system (device addressing is discussed in
detail under the Device Addressing section).
The ACE24(L)C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices
may be addressed on a single bus system. The A0 pin is a no connect.
The ACE24(L)C08 only uses A2 input for hardwire addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are no connects.
The ACE24(L)C16 does not use the device address pins, which limits the number of devices on a
single bus to one. The A0, A1 and A2 pins are no connects.
Write Protect (WP):
The ACE24(L)C02/04/08/16 has a Write Protect pin that provides hardware data protection. The Write Protect
pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is
conceded to Vcc the write protection feature is enabled.
Write Protect Description
WP Pin Status
WP=V
CC
WP=GND
Part of the Array Protected
ACE24(L)C02 ACE24(L)C04 ACE24(L)C08
ACE24(L)C16
Full (2K) Array Full (4K) Array Full (8K) Array Upper Half (8K) Array
Normal Read / Write Operations
VER 1.3
4
ACE24(L)C02/04/08/16
Two-wire Serial EEPROM
Technology
Memory Organization
ACE24(L)C02, 2K SERIAL EEPROM:
Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address
for random word addressing.
ACE24(L)C04, 4K SERIAL EEPROM:
Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit data word address
for random word addressing.
ACE24(L)C08, 8K SERIAL EEPROM:
Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit data word
address for random word addressing.
ACE24(L)C16, 16K SERIAL EEPROM:
Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word
address for random word addressing.
Pin Capacitance
Applicable over recommended operating range from: T
A
= 25℃, f = 1.0 MHz, V
CC
= +2.2V.
Symbol
C
I/O 1
C
IN 1
Test Condition
Input / Output Capacitance (SDA)
Input Capacitance (A
0
, A
1
, A
2
, SCL)
Max
8
6
Units
pF
pF
Conditions
V
I/O
= 0V
V
IN
= 0V
Note: 1. This parameter is characterized and is not 100% tested.
DC Characteristics
ACE24C02/04/08/16
Applicable over recommended operating range from: T
A
= -40℃ to +85℃, V
CC
= +2.5V to +5.5V, (unless otherwise noted).
Symbol
V
CC
I
CC1
I
CC2
I
SB1
I
SB2
I
LI
I
LO
V
IL1
V
IH1
V
OL
Parameter
Supply Voltage
Supply Current
Supply Current
Standby Current
Standby Current
Input Leakage Current
Output Leakage Current
Input Low Level
Input High Level
Output Low Level
Test Condition
Min
2.2
Typ
Max
5.5
Units
V
mA
mA
µA
µA
µA
µA
V
V
V
V
CC
= 5.0V, Read at 100K
V
CC
= 5.0V, Write at 100K
V
CC
= 2.2V, V
IN
= V
CC
/ V
SS
V
CC
= 5.0V, V
IN
= V
CC
/ V
SS
V
IN
= V
CC
/V
SS
V
OUT
= V
CC
/ V
SS
-0.6
V
CC
x0.7
V
CC
= 2.7V, I
OL
= 2.1 mA
0.4
2.0
1.0
3.0
1.0
6.0
0.10
0.05
3.0
3.0
V
CC
x0.3
V
CC
+0.5
0.4
VER 1.3
5
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