Standard Products
ACT5028 16-Bit Monolithic Tracking
Rad Hard Resolver-To-Digital Converter
www.aeroflex.com/RDC
November 1, 2006
FEATURES
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Obsolete for Future Designs, use ACT5028B Data sheet
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Radiation Performance
- Total Dose: 100Krad (Si)
- SEL Immune: > 100MeV-cm
2
/mg
+5VDC power only
Programmable: By using a few non critical external resistors and capacitors
- Resolution: 10, 12, 14 or 16 bit resolution
- Bandwidth
- Tracking rate
Low power: +5V @ 22 mA Typ.
45 to 30,000 Hz carrier frequency range
Accuracy to 5.3 Arc Minutes
Differential instrument amplifiers resolver input
-45° to +125°C Operating Temperature
Digital interface logic voltage of 3.3V to 5V
Packaging – Hermetic
- 52 Pin Ceramic QUAD Flat Package (CQFP), .956" SQ x .10"Ht max
- 52 Lead Ceramic Leadless Chip Carrier Package (CLCC), 0.765" SQ x 0.09"Ht max (EM’s only)
Evaluation board available for test and evaluation. See Aeroflex Application Note AN5028-1.
NOTE: Aeroflex Plainview does not currently have a DSCC certified Radiation Hardened Assurance Program
APPLICATIONS
This single chip Resolver-to-Digital Converter (RDC) is used in shaft angle control systems, and is suitable for space or other
radiation environments that require >100KRad total dose tolerance. The part is latchup free in heavy ion environments (e.g.,
geosynchronous orbits) and is estimated to experience SEU induced errors of less than 15 minutes of arc at a rate of 1 per device per
2 years when operating dynamically.
THEORY OF OPERATION
The ACT5028 converter is a single CMOS Type II tracking resolver to digital converter monolithic chip. It is implemented using
precision analog circuitry and digital logic. For flexibility, the converter bandwidth, dynamics and velocity scaling are externally
set with passive components. Refer to Figure 1, ACT5028 Block Diagram.
The converter is powered from +5VDC. Analog signals are referenced to signal ground, which is nominally V
CC
/2. The converter
consists of three main sections; the Analog Control Transformer (CT), the Analog Error Processor (EP) and the Digital Logic
Interface.
The CT has two analog resolver inputs (Sin and Cos) that are buffered by high impedance input instrumentation type amplifiers and
the 16 bit digital word which represents the output digital angle. The CT performs the ratiometric trigonometric computation of:
SIN(A) sin(wt) COS(B) – COS(A) sin(wt) SIN(B) = SIN(A-B) sin(wt)
Utilizing amplifiers, switches, logic and resistors in precision ratios. “A” represents the resolver angle, “B“ represents the digital
angle and sin(wt) represents the resolver reference carrier frequency.
The Error Processor is configured as a critically damped Type II loop. The AC error, SIN (A-B) sin (wt) is full wave demodulated
using the reference squared off as its drive. This DC error is integrated in an analog integrator yielding a velocity voltage which in
turn drives a Voltage Controlled Oscillator (VCO). This VCO is an incremental integrator (constant voltage input to position rate
output) which, together with the velocity integrator, forms a Type II loop. A lead is inserted to stabilize the loop and a lag is
inserted at a higher frequency to attenuate the carrier frequency ripple. The error processor drives the 16 bit digital output until it
nulls out. Then angle “A” = “B”. The digital output equals angle input to the accuracy of the precision control transformer. The
various error processor settings are done with external resistors and capacitors so that the converter loop dynamics can be easily
controlled by the user.
The digital logic interface has a separate power line, VL
I
/
O
that sets the interface logic 1 level. It can be set anywhere from +3V to
the +5V power supply.
SCD5028 Rev H
PIN DESCRIPTIONS
SIGNAL
+SIN
-SIN
+COS
-COS
+REF
-REF
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14
BIT 15
BIT 16 (LSB)
SC1
SC2
DIRECTION
INPUT
INPUT
INPUT
BIDIR
PIN
22
21
25
24
11
12
28
29
30
31
32
34
35
36
38
39
40
41
42
43
44
49
48
SIGNAL DESCRIPTION
Analog Sine input from Synchro or Resolver. 1.3Vrms nominal
Analog Cosine input from Synchro or Resolver. 1.3Vrms nominal
Analog Reference input
Digital angle data. Parallel format. Natural binary positive logic.
Bit 1, most significant bit = 180°, Bit 2 = 90°, Bit 3 = 45° and so on.
In the 10 bit mode, Bit 10 is the LSB. Bits 11-16 are 0s.
In the 12 bit mode, Bit 12 is the LSB. Bits 13-16 are 0s.
In the 14 bit mode, Bit 14 is the LSB. Bits 15-16 are 0s.
In the 16 bit mode, Bit 16 is the LSB.
INPUT
Digital input. Sets the resolution.
SC1 SC2 Resolution
0
0
10 bit
0
1
12 bit
1
0
14 bit
1
1
16 bit
Logic 0 enables digital angle output. Otherwise it is high impedance.
Logic 0 freezes the digital angle output so that it can be safely read.
Logic 1 enables the digital angle lines to be inputs to preset the angle.
Logic 0 is for normal digital angle output.
A logic 1 pulse when the digital angle changes by 1 LSB.
For turns counting. Logic 1 = counting up (CW), logic 0 = counting
down (CCW).
Ripple clock for turns counting. A logic 1 pulse = a 0° transition in
either direction.
Differential AC error output
Differential AC error input to demodulator
Differential DC error output
Differential DC input to differential velocity integrator
Differential velocity output
Input to Voltage Controlled Oscillator
Analog Power In
Digital Power In
Analog Power ground
Digital Power ground
Digital input/output DC power supply. Sets logic 1 level. +3V to +5V
Aeroflex Plainview
ENABLE*
INH*
DATA LOAD
BUSY
CW/CCW
RIPPLE
AC1
AC2
BPF1
BPF2
DEMOD1
DEMOD2
INTIN1
INTIN2
INT1
INT 2
VCOIN
V
CC
V
DD
A GND
D GND
VL
I
/
O
SCD5028 Rev H 11/1/06
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
OUTPUT
INPUT
OUTPUT
INPUT
POWER
POWER
POWER
45
47
1
50
51
52
14
13
16
15
17
18
8
6
9
10
5
4
27
3, 19, 23
26
2
* Indicates Active Low Signal
3
ABSOLUTE MAXIMUM RATINGS *
PARAMETER
Operating Temperature
Storage Temperature
Positive Power Supply Voltage (V
CC
= V
DD
)
Analog Output Current (Output Shorted to GND)
Digital Output Current (Output Shorted to GND)
Analog Input Voltage Range
Digital Input Voltage Range
Thermal Resistance Ø
JC
Specification
Maximum Junction Temperature
VALUE
-45°C to +125°C
-65°C to +150°C
-0.5 V to +7.0 V
32 mA Max
18.6 mA Max
-0.3 V to + (V
CC
+.3 V)
-0.3 V to + (V
DD
+.3 V)
1.25°C/W
135°C
* Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device.
These are stress ratings only; functional operation beyond these operating conditions is not recommended and extended
exposure beyond these operating conditions may effect device reliability.
OPERATING CONDITIONS
(T
A
= -45°C to +125°C)
POWER SUPPLY
V
DD
= V
CC
I
DD
+ I
CC
VL
I
/
O
PARAMETER
Operating Voltage
Operating Current
Interface Voltage
MIN
4.5
-
3
TYP
5
22
3.3, 5
MAX
5.5
35
5.5
UNIT
V
DC
mA
V
DC
ELECTRICAL CHARACTERISTICS
2,5,6
(T
A
= -45°C to +125°C)
PARAMETER
Accuracy
4
Repeatability
Resolution per LSB
CONDITIONS
Add 1 LSB for total Error
MIN
-
-
0.35
21.1
0.09
5.27
0.022
1.32
0.0055
0.33
TYP
±2
-
-
-
-
-
-
-
-
-
MAX
±5
1
-
-
-
-
-
-
-
-
UNITS
Minutes
LSB
Degrees
Minutes
Degrees
Minutes
Degrees
Minutes
Degrees
Minutes
10 Bit Mode
12 Bit Mode
14 Bit Mode
16 Bit Mode
Max Tracking Rate
7
10 Bit Mode
12 Bit Mode
14 Bit Mode
16 Bit Mode
VCO Frequency
SCD5028 Rev H 11/1/06
SC1 SC2
0
0
1
1
0
1
0
1
Bits Used
B1 - B10
B1 - B12
B1 - B14
B1 - B16
1024
256
64
16
1.05
4
-
-
-
-
-
-
-
-
-
-
RPS
RPS
RPS
RPS
MHz
Aeroflex Plainview
ELECTRICAL SPECIFICATIONS
2,5,6
(T
A
= -45°C to +125°C)
ANALOG SIGNAL INPUTS
SIN, COS,
REF
SYM
V
SIN
,
V
COS
,
V
REF
F
REF
PARAMETER
Voltage measurement made
between ± inputs
Frequency
1
Impedance
3
Capacitance
3
DC Bias on -Sin, -Cos
Bias Current
3
MIN
1.0
TYP
1.3
MAX UNITS
1.5
V
RMS
45
100
-
-
-
-
-
5
V
CC
/2
0.1
30K
-
15
-
50
Hz
M
Ω
pF
V
DC
nA
DIGITAL INPUTS
ENABLE,
SC2, SC1,
INH
See Note 3
V
IL
V
IH
I
IN
Logic Low
Logic High
Leakage Current
Impedance
Capacitance
DIGITAL OUTPUTS
BUSY, RIPPLE
CW/CCW
DIGITAL I/O
B1 - B16
V
IL
V
IH
V
OL
V
OH
I
IN
I
Z
Logic Low
3
Logic High
3
Logic Low @ 1.6mA
Logic High @ -1.6mA
Leakage Current
3
High-Z Leakage Current
3
-
2
-
VL
I
/
O
- .6
-
-
-
-
-
-
0.2
0.2
0.8
-
0.3
-
100
100
V
DC
V
DC
V
DC
V
DC
nA
nA
V
OL
V
OH
Logic Low @ 1.6mA
Logic High @ -1.6mA
-
VL
I
/
O
- .6
-
-
0.3
-
V
DC
V
DC
-
2
-
100
-
-
-
0.2
-
5
0.8
-
100
-
15
V
DC
V
DC
nA
M
Ω
pF
Notes
1. @ 10 Bits, F
REF
> 4 x BW
CL
@ 12 Bits, F
REF
> 8 x BW
CL
@ 14 Bits, F
REF
> 12 x BW
CL
@ 16 Bits, F
REF
> 16 x BW
CL
2. All typical values are measured at +25°C.
3. Characteristics are guaranteed by design, not production tested.
4. Accuracy apply over the full operating Power Supply voltage range, Full operating Temperature range, Reference Frequency range,
10% Signal Amplitude variation and 10% Reference Harmonic distortion.
5. For ESD protection the ACT5028 features limiting resistors in series with diodes. Proper ESD precautions are strongly
recommended to avoid functional damage or performance degradation.
6. All testing at nominal voltage.
7. All used inputs shall be tied to Ground. Bit 1 is always the MSB.
SCD5028 Rev H 11/1/06
Aeroflex Plainview
5