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Datasheet> All Categories > storage> storage> EDD5116ADTA-7BTI
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EDD5116ADTA-7BTI

Description
512M bits DDR SDRAM WTR (Wide Temperature Range)
Categorystorage    storage   
File Size523KB，49 Pages
ManufacturerELPIDA
Websitehttp://www.elpida.com/en
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EDD5116ADTA-7BTI Overview

512M bits DDR SDRAM WTR (Wide Temperature Range)

EDD5116ADTA-7BTI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerELPIDA
Parts packaging codeTSOP2
package instructionTSOP2, TSSOP66,.46
Contacts66
Reach Compliance Codeunknow
ECCN codeEAR99
access modeFOUR BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
interleaved burst length2,4,8
JESD-30 codeR-PDSO-G66
JESD-609 codee0
length22.22 mm
memory density536870912 bi
Memory IC TypeDDR DRAM
memory width16
Number of functions1
Number of ports1
Number of terminals66
word count33554432 words
character code32000000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32MX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeTSOP2
Encapsulate equivalent codeTSSOP66,.46
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)235
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
Maximum seat height1.2 mm
self refreshYES
Continuous burst length2,4,8
Maximum standby current0.003 A
Maximum slew rate0.45 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width10.16 mm

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PRELIMINARY DATA SHEET
512M bits DDR SDRAM
WTR (Wide Temperature Range)
EDD5108ADTA-TI (64M words
×
8 bits)
EDD5116ADTA-TI (32M words
×
16 bits)
Description
The the EDD5108AD and the EDD5116AD are 512M
bits Double Data Rate (DDR) SDRAM. Read and write
operations are performed at the cross points of the CK
and the /CK. This high-speed data transfer is realized
by the 2 bits prefetch-pipelined architecture. Data
strobe (DQS) both for read and write are available for
high speed and reliable data bus design. By setting
extended mode register, the on-chip Delay Locked
Loop (DLL) can be set enable or disable.
Pin Configurations
/xxx indicates active low signal.
66-pin Plastic TSOP(II)
VDD
VDD
DQ0
DQ0
VDDQ VDDQ
NC
DQ1
DQ1
DQ2
VSSQ VSSQ
NC
DQ3
DQ2
DQ4
VDDQ VDDQ
NC
DQ5
DQ3
DQ6
VSSQ VSSQ
NC
DQ7
NC
NC
VDDQ VDDQ
NC LDQS
NC
NC
VDD
VDD
NC
NC
NC
LDM
/WE
/WE
/CAS
/CAS
/RAS
/RAS
/CS
/CS
NC
NC
BA0
BA0
BA1
BA1
A10(AP) A10(AP)
A0
A0
A1
A1
A2
A2
A3
A3
VDD
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
VSS VSS
DQ15 DQ7
VSSQ VSSQ
DQ14 NC
DQ13 DQ6
VDDQ VDDQ
DQ12 NC
DQ11 DQ5
VSSQ VSSQ
DQ10 NC
DQ9 DQ4
VDDQ VDDQ
DQ8 NC
NC
NC
VSSQ VSSQ
UDQS DQS
NC
NC
VREF VREF
VSS VSS
UDM DM
/CK /CK
CK
CK
CKE CKE
NC
NC
A12 A12
A11 A11
A9
A9
A8
A8
A7
A7
A6
A6
A5
A5
A4
A4
VSS VSS
EO
Features
•
Power supply: VDD, VDDQ = 2.5V
±
0.2V
•
Data Rate: 333Mbps/266Mbps (max.)
•
Double Data Rate architecture; two data transfers per
clock cycle
•
Bi-directional, data strobe (DQS) is transmitted
/received with data, to be used in capturing data at
the receiver
•
Data inputs, outputs, and DM are synchronized with
DQS
•
4 internal banks for concurrent operation
•
DQS is edge aligned with data for READs; center
aligned with data for WRITEs
•
Differential clock inputs (CK and /CK)
•
DLL aligns DQ and DQS transitions with CK
transitions
•
Commands entered on each positive CK edge; data
and data mask referenced to both edges of DQS
•
Data mask (DM) for write data
•
Auto precharge option for each burst access
•
SSTL_2 compatible I/O
•
Programmable burst length (BL): 2, 4, 8
•
Programmable /CAS latency (CL): 2, 2.5
•
Programmable output driver strength: normal/weak
•
Refresh cycles: 8192 refresh cycles/64ms
7.8µs maximum average periodic refresh interval
•
2 variations of refresh
Auto refresh
Self refresh
•
Ambient temperature range:
−40
to +85°C
Document No. E0438E10 (Ver. 1.0)
Date Published November 2003 (K) Japan
URL: http://www.elpida.com
Elpida
Memory, Inc. 2003
L
od
Pr
X 16
X8
A0 to A12
BA0, BA1
DQ0 to DQ15
(Top view)
DQS, LDQS, UDQS
/CS
/RAS
/CAS
/WE
DM, LDM, UDM
CK
/CK
CKE
VREF
VDD
VSS
VDDQ
VSSQ
NC
Address input
Bank select address
Data-input/output
Input and output data strobe
Chip select
Row address strobe command
Column address strobe command
Write enable
Input mask
Clock input
Differential clock input
Clock enable
Input reference voltage
Power for internal circuit
Ground for internal circuit
Power for DQ circuit
Ground for DQ circuit
No connection
uc
t

EDD5116ADTA-7BTI Related Products

EDD5116ADTA-7BTI EDD5116ADTA-TI EDD5116ADTA-7ATI EDD5116ADTA-6BTI EDD5108ADTA-TI EDD5108ADTA-7BTI EDD5108ADTA-6BTI
Description 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range) 512M bits DDR SDRAM WTR (Wide Temperature Range)
Is it Rohs certified? incompatible - incompatible incompatible - incompatible incompatible
Maker ELPIDA - ELPIDA ELPIDA - ELPIDA ELPIDA
Parts packaging code TSOP2 - TSOP2 TSOP2 - TSOP2 TSOP2
package instruction TSOP2, TSSOP66,.46 - TSOP2, TSSOP66,.46 TSOP2, TSSOP66,.46 - TSOP2, TSOP2,
Contacts 66 - 66 66 - 66 66
Reach Compliance Code unknow - unknow unknow - unknow unknow
ECCN code EAR99 - EAR99 EAR99 - EAR99 EAR99
access mode FOUR BANK PAGE BURST - FOUR BANK PAGE BURST FOUR BANK PAGE BURST - FOUR BANK PAGE BURST FOUR BANK PAGE BURST
Maximum access time 0.75 ns - 0.75 ns 0.7 ns - 0.75 ns 0.7 ns
Other features AUTO/SELF REFRESH - AUTO/SELF REFRESH AUTO/SELF REFRESH - AUTO/SELF REFRESH AUTO/SELF REFRESH
JESD-30 code R-PDSO-G66 - R-PDSO-G66 R-PDSO-G66 - R-PDSO-G66 R-PDSO-G66
JESD-609 code e0 - e0 e0 - e0 e0
length 22.22 mm - 22.22 mm 22.22 mm - 22.22 mm 22.22 mm
memory density 536870912 bi - 536870912 bi 536870912 bi - 536870912 bi 536870912 bi
Memory IC Type DDR DRAM - DDR DRAM DDR DRAM - DDR DRAM DDR DRAM
memory width 16 - 16 16 - 8 8
Number of functions 1 - 1 1 - 1 1
Number of ports 1 - 1 1 - 1 1
Number of terminals 66 - 66 66 - 66 66
word count 33554432 words - 33554432 words 33554432 words - 67108864 words 67108864 words
character code 32000000 - 32000000 32000000 - 64000000 64000000
Operating mode SYNCHRONOUS - SYNCHRONOUS SYNCHRONOUS - SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C - 85 °C 85 °C - 85 °C 85 °C
Minimum operating temperature -40 °C - -40 °C -40 °C - -40 °C -40 °C
organize 32MX16 - 32MX16 32MX16 - 64MX8 64MX8
Package body material PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSOP2 - TSOP2 TSOP2 - TSOP2 TSOP2
Package shape RECTANGULAR - RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE - SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE - SMALL OUTLINE, THIN PROFILE SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius) 235 - 235 235 - 235 235
Certification status Not Qualified - Not Qualified Not Qualified - Not Qualified Not Qualified
Maximum seat height 1.2 mm - 1.2 mm 1.2 mm - 1.2 mm 1.2 mm
self refresh YES - YES YES - YES YES
Maximum supply voltage (Vsup) 2.7 V - 2.7 V 2.7 V - 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V - 2.3 V 2.3 V - 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V - 2.5 V 2.5 V - 2.5 V 2.5 V
surface mount YES - YES YES - YES YES
technology CMOS - CMOS CMOS - CMOS CMOS
Temperature level INDUSTRIAL - INDUSTRIAL INDUSTRIAL - INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING - GULL WING GULL WING - GULL WING GULL WING
Terminal pitch 0.65 mm - 0.65 mm 0.65 mm - 0.65 mm 0.65 mm
Terminal location DUAL - DUAL DUAL - DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
width 10.16 mm - 10.16 mm 10.16 mm - 10.16 mm 10.16 mm

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