ACT-S512K32V-020P1Q datasheet, PDF

ACT-S512K32V-020P1Q: DescriptionCache SRAM Module, 2MX8, 20ns, CMOS, CPGA66, 1.400 X 1.400 INCH, 0.245 INCH HEIGHT, PGA-66; Categorystorage storage; File Size448KB，8 Pages; ManufacturerCobham PLC

Download Datasheet Parametric View All

ACT-S512K32V-020P1Q Overview

Cache SRAM Module, 2MX8, 20ns, CMOS, CPGA66, 1.400 X 1.400 INCH, 0.245 INCH HEIGHT, PGA-66

Parameter Name	Attribute value
Maker	Cobham PLC
package instruction	PGA,
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	20 ns
Other features	USER CONFIGURABLE AS 512K X 32 OR 1M X 16
JESD-30 code	S-CPGA-P66
memory density	16777216 bit
Memory IC Type	CACHE SRAM MODULE
memory width	8
Number of functions	1
Number of terminals	66
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2MX8
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	6.223 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Base Number Matches	1

Error: Can't fit design in device: Error: Can't fit design in deviceError: Can't place all RAM cells in designInfo: Selected device has 26 memory locations of type M4K. The current design requires 48 memory locations of type M4K to suc...; eeleader-mcu FPGA/CPLD

Some simple conceptual questions about Xilinx microblaze: [size=5]Question 1: When adding GPIO in microblaze, what are the differences between the following three sub-options AXI General Purpose IO, LMB I/O Module, and XPS General Purpose IO? [/size][size=5]...; hjl240 FPGA/CPLD

Urgently seeking: All contents of the airline ticket booking system!: Including database design, detailed design specifications, test plan, test analysis report...; cykyelec Embedded System

uClinux system transplantation and implementation of web-server based on FPGA[2]: uClinux system transplantation based on FPGA and implementation of web-server[2] 2. Embedding uClinux under Linux This article mainly talks about the embedding of uClinux (2.6.26) under Linux system (...; lammy Linux and Android

Assembler base conversion program: MCS-51 single-chip hexadecimal decimal conversion assembly source program RW0 equ 0x08 RW1 equ 0x09 RW2 equ 0x0A RW3 equ 0x0B RW4 equ 0x0C RW5 equ 0x0D RW6 equ 0x0E RW7 equ 0x0F U_byte equ 0x10 ; high...; wuquan-1230 MCU

Parameter configuration method for pin multiplexing of i.MX6UL development board (PINMUX): NXP Cortex-A7 [/size][/font][/color][color=rgb(48, 48, 48)][url=http://www.forlinx.com/69.htm][font=微软雅黑][size=12px]i.MX6UltraLite[/size][/font][/url][/color][color=rgb(48, 48, 48)][font=微软雅黑][size=12...; flseo ARM Technology

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components