EBE51FD8AGFN-6E-E datasheet, PDF

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EBE51FD8AGFN-6E-E: Description512MB Fully Buffered DIMM; Categorystorage storage; File Size154KB，22 Pages; ManufacturerELPIDA; Websitehttp://www.elpida.com/en

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EBE51FD8AGFN-6E-E Overview

512MB Fully Buffered DIMM

EBE51FD8AGFN-6E-E Parametric

Parameter Name	Attribute value
Maker	ELPIDA
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	240
Reach Compliance Code	unknow
ECCN code	EAR99
access mode	SINGLE BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N240
memory density	4831838208 bi
Memory IC Type	DDR DRAM MODULE
memory width	72
Number of functions	1
Number of ports	1
Number of terminals	240
word count	67108864 words
character code	64000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature
organize	64MX72
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	NO
technology	CMOS
Temperature level	OTHER
Terminal form	NO LEAD
Terminal location	DUAL

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PRELIMINARY DATA SHEET

512MB Fully Buffered DIMM

EBE51FD8AGFD

EBE51FD8AGFN

Specifications

•

Density: 512MB

•

Organization



64M words

72 bits, 1 rank

•

Mounting 9 pieces of 512M bits DDR2 SDRAM

sealed in FBGA

•

Package



240-pin fully buffered, socket type dual in line

memory module (FB-DIMM)

PCB height: 30.35mm

Lead pitch: 1.00mm



Advanced Memory Buffer (AMB): 655-ball FCBGA



Lead-free (RoHS compliant)

•

Power supply



DDR2 SDRAM: VDD

1.8V

0.1V



AMB: VCC

1.5V

0.075V/−0.045

•

Data rate: 667Mbps/533Mbps (max.)

•

Four internal banks for concurrent operation

(components)

•

Interface: SSTL_18

•

Burst lengths (BL): 4, 8

•

/CAS Latency (CL): 3, 4, 5

•

Precharge: auto precharge option for each burst

access

•

Refresh: auto-refresh, self-refresh

•

Refresh cycles: 8192 cycles/64ms



Average refresh period

7.8µs at 0°C

≤

≤ +85°C

3.9µs at

+85°C <

≤ +95°C

•

Operating case temperature range



TC = 0°C to +95°C

Features

•

JEDEC standard Raw Card A Design

•

Industry Standard Advanced Memory Buffer (AMB)

•

High-speed differential point-to-point link interface at

1.5V (JEDEC draft spec)



14 north-bound (NB) high speed serial lanes



10 south-bound (SB) high speed serial lanes

•

Various features/modes:



MemBIST and IBIST test functions



Transparent mode and direct access mode for

DRAM testing



Interface for a thermal sensor and status indicator

•

Channel error detection and reporting

•

Automatic DDR2 SDRAM bus and channel

calibration

•

SPD (serial presence detect) with 1piece of 256 byte

serial EEPROM

Note: Warranty void if removed DIMM heat

spreader.

Performance

FB-DIMM

System clock

frequency

167MHz

133MHz

Speed grade

PC2-5300F

PC2-4200F

Peak channel

throughput

8.0GByte/s

6.4GByte/s

FB-DIMM link data rate

4.0Gbps

3.2Gbps

DDR2 SDRAM

Speed Grade

DDR2-667 (5-5-5)

DDR2-533 (4-4-4)

DDR data rate

667Mbps

533Mbps

Document No. E0869E30 (Ver. 3.0)

Date Published August 2006 (K) Japan

Printed in Japan

URL: http://www.elpida.com

Elpida

Memory, Inc. 2006

EBE51FD8AGFD, EBE51FD8AGFN

Advanced Memory Buffer Overview

The Advanced Memory Buffer (AMB) reference design complies with the FB-DIMM Architecture and Protocol

Specification. It supports DDR2 SDRAM main memory. The AMB allows buffering of memory traffic to support large

memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing,

refresh, scrubbing, sparing, configuration access, and power management. The AMB interface is responsible for

handling FB-DIMM channel and memory requests to and from the local DIMM and for forwarding requests to other

DIMMs on the FB-DIMM channel.

The FB-DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface.

FB-DIMMs use commodity DRAMs isolated from the channel behind a buffer on the DIMM. The memory capacity is

288 devices per channel and total memory capacity scales with DRAM bit density.

The AMB is the buffer that isolates the DRAMs from the channel.

Advanced Memory Buffer Functionality

The AMB will perform the following FB-DIMM channel functions.

•

Supports channel initialization procedures as defined in the initialization chapter of the FB-DIMM Architecture and

Protocol Specification to align the clocks and the frame boundaries, verify channel connectivity, and identify AMB

DIMM position.

•

Supports the forwarding of southbound and northbound frames, servicing requests directed to a specific AMB or

DIMM, as defined in the protocol chapter, and merging the return data into the northbound frames.

•

If the AMB resides on the last DIMM in the channel, the AMB initializes northbound frames.

•

Detects errors on the channel and reports them to the host memory controller.

•

Support the FB-DIMM configuration register set as defined in the register chapters.

•

Acts as DRAM memory buffer for all read, write, and configuration accesses addressed to the DIMM.

•

Provides a read buffer FIFO and a write buffer FIFO.

•

Supports an SMBus protocol interface for access to the AMB configuration registers.

•

Provides logic to support MemBIST and IBIST design for test functions.

•

Provides a register interface for the thermal sensor and status indicator.

•

Functions as a repeater to extend the maximum length of FB-DIMM links.

Preliminary Data Sheet E0869E30 (Ver. 3.0)

EBE51FD8AGFN-6E-E Related Products

	EBE51FD8AGFN-6E-E	EDE5108AGSE-6E-E	EDE5108AGSE-5C-E	EBE51FD8AGFD	EBE51FD8AGFN	EBE51FD8AGFD-6E-E
Description	512MB Fully Buffered DIMM	512MB Fully Buffered DIMM	512MB Fully Buffered DIMM	512MB Fully Buffered DIMM	512MB Fully Buffered DIMM	512MB Fully Buffered DIMM
Maker	ELPIDA	ELPIDA	ELPIDA	-	-	ELPIDA
Parts packaging code	DIMM	BGA	BGA	-	-	DIMM
package instruction	DIMM,	TFBGA, BGA60,9X11,32	TFBGA, BGA60,9X11,32	-	-	DIMM,
Contacts	240	60	60	-	-	240
Reach Compliance Code	unknow	unknow	unknow	-	-	unknow
ECCN code	EAR99	EAR99	EAR99	-	-	EAR99
access mode	SINGLE BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	-	-	SINGLE BANK PAGE BURST
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	-	-	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N240	R-PBGA-B60	R-PBGA-B60	-	-	R-XDMA-N240
memory density	4831838208 bi	536870912 bi	536870912 bi	-	-	4831838208 bi
Memory IC Type	DDR DRAM MODULE	DDR DRAM	DDR DRAM	-	-	DDR DRAM MODULE
memory width	72	8	8	-	-	72
Number of functions	1	1	1	-	-	1
Number of ports	1	1	1	-	-	1
Number of terminals	240	60	60	-	-	240
word count	67108864 words	67108864 words	67108864 words	-	-	67108864 words
character code	64000000	64000000	64000000	-	-	64000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	-	-	SYNCHRONOUS
Maximum operating temperature	85 °C	85 °C	85 °C	-	-	85 °C
organize	64MX72	64MX8	64MX8	-	-	64MX72
Package body material	UNSPECIFIED	PLASTIC/EPOXY	PLASTIC/EPOXY	-	-	UNSPECIFIED
encapsulated code	DIMM	TFBGA	TFBGA	-	-	DIMM
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	-	-	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	GRID ARRAY, THIN PROFILE, FINE PITCH	GRID ARRAY, THIN PROFILE, FINE PITCH	-	-	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified	Not Qualified	Not Qualified	-	-	Not Qualified
self refresh	YES	YES	YES	-	-	YES
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	-	-	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	-	-	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	-	-	1.8 V
surface mount	NO	YES	YES	-	-	NO
technology	CMOS	CMOS	CMOS	-	-	CMOS
Temperature level	OTHER	OTHER	OTHER	-	-	OTHER
Terminal form	NO LEAD	BALL	BALL	-	-	NO LEAD
Terminal location	DUAL	BOTTOM	BOTTOM	-	-	DUAL

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