5962H9651902QXA datasheet, PDF

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5962H9651902QXA: DescriptionAND Gate, ACT Series, 4-Func, 2-Input, CMOS, CDFP14, DFP-14; Categorylogic logic; File Size261KB，22 Pages; ManufacturerCobham PLC

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5962H9651902QXA Overview

AND Gate, ACT Series, 4-Func, 2-Input, CMOS, CDFP14, DFP-14

5962H9651902QXA Parametric

Parameter Name	Attribute value
Maker	Cobham PLC
package instruction	DFP, FL14,.3
Reach Compliance Code	unknown
ECCN code	3A001.A.1.A
series	ACT
JESD-30 code	R-CDFP-F14
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.006 A
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DFP
Encapsulate equivalent code	FL14,.3
Package shape	RECTANGULAR
Package form	FLATPACK
power supply	3.3/5 V
Prop。Delay @ Nom-Sup	17 ns
propagation delay (tpd)	17 ns
Certification status	Qualified
Schmitt trigger	NO
Filter level	MIL-PRF-38535 Class Q
Maximum seat height	2.921 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	4.5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	FLAT
Terminal pitch	1.27 mm
Terminal location	DUAL
total dose	1M Rad(Si) V
width	6.2865 mm
Base Number Matches	1

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REVISIONS

LTR

DESCRIPTION

Changes in accordance with NOR 5962-R076-97. - JAK

Incorporate NOR and update boilerplate to latest MIL-PRF-38535 requirements.

– CFS

Add device types 02 and 03. Add test circuit and make changes to voltage

levels for the waveforms in figure 4. Editorial changes throughout. – TVN

Add ASTM guideline in 2.2. Correct voltage level testing in switching waveforms

and test circuit, figure 4. Updated RHA testing paragraphs in 4.4.4.1

4.4.4.4.

Add appendix A. - JAK

Correct radiation features for device type 02 in section 1.5 and add footnote 8/.

Correct footnotes 2/ and 8/ in Table IA. Correct SEP test limit in the table IB.

Update boilerplate paragraphs to current MIL-PRF-38535 requirements.- MAA

Make corrections to table IA, output voltage tests V

and V

, change

condition V

- jak

Change radiation level H to G for device type 01. Update radiation features in

section 1.5 and footnote 2/ in table IA. - MAA

Add equivalent test circuits and footnote 6 to figure 4. Delete class M

requirements. - MAA

DATE (

YR-MO-DA

)

96-11-25

01-06-11

04-05-27

APPROVED

Monica L. Poelking

Thomas M. Hess

07-08-29

Thomas M. Hess

09-10-05

Thomas M. Hess

11-01-26

11-04-18

12-10-25

Thomas M. Hess

David J. Corbett

Thomas M. Hess

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Thanh V. Nguyen

CHECKED BY

Thanh V. Nguyen

APPROVED BY

Monica L. Poelking

DRAWING APPROVAL DATE

96-06-11

REVISION LEVEL

AMSC N/A

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS AVAILABLE

FOR USE BY ALL DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

http://www.landandmaritime.dla.mil

MICROCIRCUIT, DIGITAL, ADVANCED CMOS,

RADIATION HARDENED, QUADRUPLE 2-INPUT AND

GATE, TTL COMPATIBLE INPUTS, MONOLITHIC

SILICON

SIZE

CAGE CODE

67268

5962-96519

SHEET 1 OF 21

DSCC FORM 2233

APR 97

5962-E017-13

1.3 Absolute maximum ratings. 1/ 2/ 3/

Supply voltage range (V

) .................................................................................. -0.3 V dc to +7.0 V dc

DC input voltage range (V

) ................................................................................ -0.3 V dc to V

+ 0.3 V dc

DC output voltage range (V

OUT

) ........................................................................... -0.3 V dc to V

+ 0.3 V dc

DC input current, any one input (I

).....................................................................

±10

Latch-up immunity current (I

) ............................................................................

±150

Storage temperature range (T

STG

) ....................................................................... -65°C to +150°C

Lead temperature (soldering, 5 seconds) ............................................................ +300°C

Thermal resistance, junction-to-case (θ

Case outline C and X (device type 01)............................................................... See MIL-STD-1835

Case outline X (device types 02 and 03) ........................................................... 15°C/W

Junction temperature (T

) .................................................................................... +175°C

Maximum package power dissipation (P

Device type 01 ................................................................................................... 1.0 W

Device types 02 and 03 ..................................................................................... 3.2 W 4/

1.4 Recommended operating conditions. 2/ 3/

Supply voltage range (V

Device type 01 ................................................................................................. +4.5 V dc to +5.5 V dc

Device types 02 and 03 ................................................................................... +3.0 V dc to +5.5 V dc

Input voltage range (V

) ...................................................................................... +0.0 V dc to V

Output voltage range (V

OUT

)................................................................................. +0.0 V dc to V

Case operating temperature range (T

) ............................................................... -55°C to +125°C

Maximum input rise or fall time rate at V

= 4.5 V (t

, t

) ..................................... 1 ns/V 5/

1.5 Radiation features. 6/

Maximum total dose available:

Device type 01 (dose rate = 50 – 300 rad (Si)/s) .............................................. 500 Krad (Si) 7/

Device type 02 (effective dose rate = 1rad (Si)/s) ............................................ 1 Mrad (Si) 8/

Device type 03 (dose rate = 50 – 300 rad (Si)/s) .............................................. 500 Krad (Si) 7/

Single event phenomenon (SEP):

Device type 01:

No SEU occurs at effective LET (see 4.4.4.4) ................................................... ≤ 80 MeV/(mg/cm ) 9/

No SEL occurs at effective LET (see 4.4.4.4) ................................................... ≤ 120 MeV/(mg/cm ) 9/

Device types 02 and 03:

No SEU occurs at effective LET (see 4.4.4.4) ................................................... ≤ 108 MeV/(mg/cm ) 9/

No SEL occurs at effective LET (see 4.4.4.4) .................................................. ≤ 120 MeV/(mg/cm ) 9/

Dose rate induced upset (20 ns pulse) (device types 01, 02 and 03) .................. 1 x 10 Rad(Si)/s 9/ 10/

Dose rate induced latch-up .................................................................................

None 9/

Dose rate survivability (device types 01, 02 and 03) ........................................... 1 x 10 Rad (Si)/s 9/

Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum

levels may degrade performance and affect reliability.

2/ Unless otherwise specified, all voltages are referenced to V

3/ The limits for the parameters specified herein shall apply over the full specified V

range and case temperature range

of -55°C to +125°C unless otherwise specified.

4/ Per MIL-STD-883 method 1012.1 section 3.4.1, P

(Package) = (T

(max) - T

(max)) .

5/ Derate system propagation delays by difference in rise time to switch point for t

or t

> 1 ns/V.

6/ Radiation testing is performed on the standard evaluation circuit.

7/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A.

8/ Device type 02 is irradiated at dose rate = 50 - 300 rad (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is

guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per

MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified

effective dose rate, or lower, environment.

9/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the

purchase order or contract.

10/ This limit is applicable for device types 01, 02, 03 with V

≥ 4.5 V. Device types 02 and 03 do not meet this limit at V

< 4.5 V.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-96519

SHEET

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with

MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The

modification in the QM plan shall not affect the form, fit, or function as described herein.

3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535 and herein for device classes Q and V.

3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.

3.2.3 Truth table. The truth table shall be as specified on figure 2.

3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.

3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4.

3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document

revision level control and shall be made available to the preparing and acquiring activity upon request.

3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the

electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the

full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical

tests for each subgroup are described in table IA.

3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be

marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer

has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be

marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535.

3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in

MIL-PRF-38535.

3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535

listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance

submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the

manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein.

3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall

be provided with each lot of microcircuits delivered to this drawing.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AND MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

5962-96519

SHEET

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