INTEGRATED CIRCUITS
DATA SHEET
74LVC4066
Quad bilateral switches
Product specification
2003 Aug 12
Philips Semiconductors
Product specification
Quad bilateral switches
FEATURES
•
Very low ON resistance:
– 7.5
Ω
(typical) at V
CC
= 2.7 V
– 6.5
Ω
(typical) at V
CC
= 3.3 V
– 6
Ω
(typical) at V
CC
= 5 V.
•
ESD protection:
– HBM EIA/JESD22-A114-A Exceeds 2000 V
– MM EIA/JESD22-A115-A Exceeds 200 V.
•
High noise immunity
•
CMOS low power consumption
•
Latch up performance exceeds 250 mA
•
Complies with JEDEC standard no. 8-1A
•
Direct interface TTL-levels.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns.
SYMBOL
t
PZH
/t
PZL
t
PHZ
/t
PLZ
C
I
C
PD
C
S
PARAMETER
turn-on time E to V
os
turn-off time E to V
os
input capacitance
power dissipation capacitance
switch capacitance
CONDITIONS
C
L
= 50 pF; R
L
= 500
Ω;
V
CC
= 3 V
C
L
= 50 pF; R
L
= 500
Ω;
V
CC
= 5 V
C
L
= 50 pF; R
L
= 500
Ω;
V
CC
= 3 V
C
L
= 50 pF; R
L
= 500
Ω;
V
CC
= 5 V
V
CC
= 3 V
V
CC
= 3.3 V; notes 1 and 2
OFF-state
ON-state
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N + ((C
L
+ C
S
)
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
C
S
= switch capacitance.
2. The condition is V
I
= GND to V
CC
.
DESCRIPTION
74LVC4066
The 74LVC4066 is a high-speed Si-gate CMOS device.
The 74LVC4066 has four independent analog switches.
Each switch has two input/output terminals (nY and nZ)
and an active HIGH enable input (nE). When nE is LOW,
the analog switch is turned off.
TYPICAL
2.5
1.9
3.4
2.5
3.5
12.5
8.0
14.0
ns
ns
ns
ns
pF
pF
pF
pF
UNIT
2003 Aug 12
2
Philips Semiconductors
Product specification
Quad bilateral switches
FUNCTION TABLE
See note 1.
INPUT nE
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
74LVC4066D
74LVC4066PW
74LVC4066BQ
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
1Y
1Z
2Z
2Y
2E
3E
GND
3Y
3Z
4Z
4Y
4E
1E
V
CC
DESCRIPTION
independent input/output
independent output/input
independent output/input
independent input/output
enable input (active HIGH)
enable input (active HIGH)
ground (0 V)
independent input/output
independent output/input
independent output/input
independent input/output
enable input (active HIGH)
enable input (active HIGH)
supply voltage
handbook, halfpage
74LVC4066
SWITCH
OFF
ON
TEMPERATURE
RANGE
−40
to +125
°C
−40
to +125
°C
−40
to +125
°C
PINS
14
14
14
PACKAGE
SO14
TSSOP14
DHVQFN14
MATERIAL
plastic
plastic
plastic
CODE
SOT108-2
SOT402-1
SOT762-1
1Y
1Z
2Z
2Y
2E
3E
GND
1
2
3
4
5
6
7
MNB109
14 VCC
13 1E
12 4E
4066
11 4Y
10 4Z
9
3Z
8 3Y
Fig.1 Pin configuration SO14 and TSSOP14.
2003 Aug 12
3
Philips Semiconductors
Product specification
Quad bilateral switches
74LVC4066
handbook, halfpage
1Y
1
VCC
14
13
12
1E
4E
4Y
handbook, halfpage
1
13
4
5
1Y
1E
2Y
2E
3Y
3E
4Y
4E
1Z
2
1Z
2Z
2Y
2E
3E
2
3
4
5
6
7
Top view
GND
8
3Y
2Z
3
GND
(1)
11
10
9
8
4Z
3Z
6
11
12
MNB110
3Z
9
4Z 10
MNB111
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic symbol.
1
1
13 #
4
5
8
6
11
12 #
(a)
#
10
#
9
8
6
11
12 #
#
3
2
13 #
4
5
#
1
X1
1
2
handbook, halfpage
1
X1
1
X1
1
3
Z
1
9
Y
E
1
X1
(b)
1
10
VCC
MNA658
MNB112
Fig.4 logic symbol (IEEE/IEC).
Fig.5 Logic diagram (one switch).
2003 Aug 12
4
Philips Semiconductors
Product specification
Quad bilateral switches
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
S
T
amb
t
r
, t
f
PARAMETER
supply voltage
input voltage
switch voltage
operating ambient temperature
input rise and fall times
V
CC
= 1.65 to 2.7 V
V
CC
= 2.7 to 5.5 V
CONDITIONS
74LVC4066
MIN.
1.65
0
0
−40
0
0
MAX.
5.5
5.5
V
CC
+125
20
10
UNIT
V
V
V
°C
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V);
see note 1.
SYMBOL
V
CC
V
I
I
IK
I
SK
V
S
I
S
I
CC
, I
GND
T
stg
P
tot
Notes
1. To avoid drawing V
CC
current out of terminal Z, when switch current flows in terminal Y, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
CC
current will flow out of
terminal Y. In this case there is no limit for the voltage drop across the switch, but the voltage at Y and Z may not
exceed V
CC
or GND.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3. For SO14 packages: above 70
°C
derate linearly with 8 mW/K.
For TSSOP14 packages: above 60
°C
derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60
°C
derate linearly with 4.5 mW/K.
PARAMETER
supply voltage
input voltage
input diode current
switch diode current
switch voltage
switch source or sink current
V
CC
or GND current
storage temperature
power dissipation
T
amb
=
−40
to +125
°C;
note 3
note 2
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
enable and disable mode
−0.5
< V
S
< V
CC
+ 0.5 V
CONDITIONS
MIN.
−0.5
−0.5
−
−
−0.5
−
−
−65
−
MAX.
+6.5
+6.5
−50
±50
+6.5
±50
±100
+150
500
UNIT
V
V
mA
mA
V
mA
mA
°C
mW
2003 Aug 12
5
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