Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant
inputs/outputs (3-state)
FEATURES
•
5 V tolerant inputs/outputs for interfacing with 5 V logic
•
Wide supply voltage range from 1.2 to 3.6 V
•
CMOS low power consumption
•
Direct interface with TTL levels
•
Inputs accept voltages up to 5.5 V
•
High-impedance when V
CC
= 0 V
•
Bushold on all data inputs (74LVCH244A only)
•
Complies with JEDEC standard no. 8-1A
•
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
•
Specified from
−40
to +85
°C
and
−40
to +125
°C.
DESCRIPTION
74LVC244A;
74LVCH244A
The 74LVC244A/74LVCH244A is a high performance,
low-power, low-voltage, Si-gate CMOS device, superior to
most advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices. In
3-state operation, outputs can handle 5 V. These features
allow the use of these devices as translators in a mixed
3.3 and 5 V environment.
The 74LVC244A/74LVCH244A is an octal non-inverting
buffer/line driver with 3-state outputs. The 3-state outputs
are controlled by the output enable inputs 1OE and 2OE.
A HIGH on nOE causes the outputs to assume a
high-impedance OFF-state. Schmitt-trigger action at all
inputs makes the circuit highly tolerant for slower input rise
and fall times.
The 244 is functionally identical to the 240, but the 240 has
inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°C;
t
r
= t
f
≤
2.5 ns.
SYMBOL
t
PHL
/t
PLH
C
I
C
PD
Notes
1. C
PD
is used to determine the dynamic power dissipation (P
D
in
µW).
P
D
= C
PD
×
V
CC2
×
f
i
×
N +
Σ(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = total load switching outputs;
Σ(C
L
×
V
CC2
×
f
o
) = sum of the outputs.
2. The condition is V
I
= GND to V
CC
.
PARAMETER
propagation delay 1An to 1Yn, 2An to 2Yn
input capacitance
power dissipation capacitance per buffer
V
CC
= 3.3 V; notes 1 and 2
CONDITIONS
C
L
= 50 pF; V
CC
= 3.3 V
TYPICAL
2.8
4.0
10
ns
pF
pF
UNIT
2003 Oct 30
2
Philips Semiconductors
Product specification
Octal buffer/line driver with 5 V tolerant
inputs/outputs (3-state)
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
SYMBOL
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND
DESCRIPTION
output enable input (active
LOW)
data input
bus output
data input
bus output
data input
bus output
data input
bus output
ground (0 V)
20
PIN
11
12
13
14
15
16
17
18
19
74LVC244A; 74LVCH244A
SYMBOL
2A3
1Y3
2A2
1Y2
2A1
1Y1
2A0
1Y0
2OE
V
CC
DESCRIPTION
bus input
bus output
bus input
bus output
bus input
bus output
bus input
bus output
output enable input
(active LOW)
supply voltage
handbook, halfpage
1OE
1
VCC
20
19
18
17
16
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
handbook, halfpage
1OE 1
1A0 2
2Y0 3
1A1 4
2Y1 5
1A2 6
2Y2 7
1A3 8
2Y3 9
GND 10
MNA872
20 VCC
19 2OE
1A0
2Y0
2
3
4
5
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
11 2A3
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND
(1)
6
7
8
9
10
Top view
GND
11
2A3
MBL761
15
14
13
12
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO and (T)SSOP.
Fig.2 Pin configuration DHVQFN20.
2003 Oct 30
4
DIY/Open Source Hardware
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