UC1525A/27A
UC2525A/27A
UC3525A/27A
Regulating Pulse Width Modulators
FEATURES
•
•
•
•
•
•
•
•
•
•
8 to 35V Operation
5.1V Reference Trimmed to
±1%
100Hz to 500kHz Oscillator
Range
Separate Oscillator Sync
Terminal
Adjustable Deadtime Control
Internal Soft-Start
Pulse-by-Pulse Shutdown
Input Undervoltage Lockout
with Hysteresis
Latching PWM to Prevent
Multiple Pulses
Dual Source/Sink Output
Drivers
DESCRIPTION
The UC1525A/1527A series of pulse width modulator integrated circuits are de-
signed to offer improved performance and lowered external parts count when used
in designing all types of switching power supplies. The on-chip +5.1V reference is
trimmed to
±1%
and the input common-mode range of the error amplifier includes
the reference voltage, eliminating external resistors. A sync input to the oscillator
allows multiple units to be slaved or a single unit to be synchronized to an external
system clock. A single resistor between the C
T
and the discharge terminals pro-
vides a wide range of dead-time adjustment. These devices also feature built-in
soft-start circuitry with only an external timing capacitor required. A shutdown termi-
nal controls both the soft-start circuitry and the output stages, providing instantane-
ous turn off through the PWM latch with pulsed shutdown, as well as soft-start
recycle with longer shutdown commands. These functions are also controlled by
an undervoltage lockout which keeps the outputs off and the soft-start capacitor
discharged for sub-normal input voltages. This lockout circuitry includes approxi-
mately 500mV of hysteresis for jitter-free operation. Another feature of these PWM
circuits is a latch following the comparator. Once a PWM pulse has been termi-
nated for any reason, the outputs will remain off for the duration of the period. The
latch is reset with each clock pulse. The output stages are totem-pole designs ca-
pable of sourcing or sinking in excess of 200mA. The UC1525A output stage fea-
tures NOR logic, giving a LOW output for an OFF state. The UC1527A utilizes OR
logic which results in a HIGH output level when OFF.
BLOCK DIAGRAM
2/96
UC1525A/27A
UC2525A/27A
UC3525A/27A
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage, (+V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Collector Supply Voltage (V
C
) . . . . . . . . . . . . . . . . . . . . . . +40V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +5.5V
Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +V
IN
Output Current, Source or Sink . . . . . . . . . . . . . . . . . . . 500mA
Reference Output Current . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Oscillator Charging Current . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Power Dissipation at T
A
= +25°C (Note 2) . . . . . . . . . . 1000mW
Power Dissipation at T
C
= +25°C (Note 2) . . . . . . . . . . 2000mW
Operating Junction Temperature . . . . . . . . . . . -55°C to +150°C
Storage Temperature Range . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 seconds). . . . . . . . . . +300°C
Note 1: Values beyond which damage may occur.
Note 2: Consult packaging Section of Databook for thermal
limitations and considerations of package.
RECOMMENDED OPERATING CONDITIONS
(Note 3)
Input Voltage (+V
IN
) . . . . . . . . . . . . . . . . . . . . . . . . +8V to +35V
Collector Supply Voltage (V
C
) . . . . . . . . . . . . . . +4.5V to +35V
Sink/Source Load Current (steady state) . . . . . . . . 0 to 100mA
Sink/Source Load Current (peak) . . . . . . . . . . . . . . 0 to 400mA
Reference Load Current . . . . . . . . . . . . . . . . . . . . . . 0 to 20mA
Oscillator Frequency Range . . . . . . . . . . . . . . 100Hz to 400kHz
Oscillator Timing Resistor. . . . . . . . . . . . . . . . . . . 2kΩ to 150kΩ
Oscillator Timing Capacitor. . . . . . . . . . . . . . . . .001µF to 0.1µF
Dead Time Resistor Range . . . . . . . . . . . . . . . . . . . . 0 to 500Ω
Operating Ambient Temperature Range
UC1525A, UC1527A . . . . . . . . . . . . . . . . . . -55°C to +125°C
UC2525A, UC2527A . . . . . . . . . . . . . . . . . . . -25°C to +85°C
UC3525A, UC3527A . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Note 3: Range over which the device is functional and
parameter limits are guaranteed.
CONNECTION DIAGRAMS
DIL-16 (TOP VIEW)
J or N Package
PLCC-20, LCC-20 (TOP VIEW)
Q, L Package
PACKAGE PIN FUNCTION
FUNCTION
PIN
N/C
Inv. Input
N.I. Input
SYNC
OSC. output
N/C
C
T
R
T
Discharge
Softstart
N/C
Compensation
Shutdown
Output A
Ground
N/C
V
C
Output B
+V
IN
V
REF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
2
UC1525A/27A
UC2525A/27A
UC3525A/27A
ELECTRICAL CHARACTERISTICS:
+V
IN
= 20V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER
Reference Section
Output Voltage
Line Regulation
Load Regulation
Temperature Stability (Note 5)
Total Output Variation (Note 5)
Shorter Circuit Current
Output Noise Voltage (Note 5)
Long Term Stability (Note 5)
Oscillator Section
(Note 6)
Initial Accuracy (Notes 5 & 6)
Voltage Stability (Notes 5 & 6)
Temperature Stability (Note 5)
Minimum Frequency
Maximum Frequency
Current Mirror
Clock Amplitude (Notes 5 & 6)
Clock Width (Notes 5 & 6)
Sync Threshold
Sync Input Current
Input Offset Voltage
Input Bias Current
Input Offset Current
DC Open Loop Gain
Gain-Bandwidth Product
(Note 5)
DC Transconductance
(Notes 5 & 7)
Output Low Level
Output High Level
Common Mode Rejection
Supply Voltage Rejection
V
CM
= 1.5 to 5.2V
V
IN
= 8 to 35V
3.8
60
50
R
L
≥
10MΩ
Ω
A
V
= 0dB, T
J
= 25°C
°
Ω
Ω
T
J
= 25°C, 30kΩ
≤
R
L
≤
1MΩ
60
1
1.1
75
2
1.5
0.2
5.6
75
60
0.5
3.8
60
50
Sync Voltage = 3.5V
Error Amplifier Section
(V
CM
= 5.1V)
0.5
1
5
10
1
60
1
1.1
75
2
1.5
0.2
5.6
75
60
0.5
2
1
10
10
1
mV
µA
µA
dB
MHz
mS
V
V
dB
dB
T
J
= 25°C
T
J
= 25°C
V
IN
= 8 to 35V
Over Operating Range
Ω
µ
R
T
= 200kΩ, C
T
= 0.1µF
R
T
= 2kΩ, C
T
= 470pF
Ω
I
RT
= 2mA
400
1.7
3.0
0.3
1.2
2.0
3.5
0.5
2.0
1.0
1.0
2.8
2.5
2.2
±
2
±
0.3
±
3
±
6
±
1
±
6
120
400
1.7
3.0
0.3
1.2
2.0
3.5
0.5
2.0
1.0
1.0
2.8
2.5
2.2
±
2
±
1
±
3
±
6
±
2
±
6
120
%
%
%
Hz
kHz
mA
V
µs
V
mA
T
J
= 25°C
V
IN
= 8 to 35V
I
L
= 0 to 20mA
Over Operating Range
Line, Load, and Temperature
V
REF
= 0, T
J
= 25°C
10Hz
≤
10kHz, T
J
=
25°C
T
J
= 125°C
5.00
80
40
20
5.05
5.10
10
20
20
5.15
20
50
50
5.20
100
200
50
4.95
80
40
20
5.00
5.10
10
20
20
5.20
20
50
50
5.25
100
200
50
V
mA
µVrms
mV
V
mV
mV
TEST CONDITIONS
UC1525A/UC2525A
UC1527A/UC2527A
MIN
TYP
MAX
MIN
UC3525A
UC3527A
TYP
MAX
UNITS
Note 5: These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
Note 6: Tested at f
OSC
= 40kHz (R
T
= 3.6k
Ω
, C
T
= 0.01
µ
F, R
D
= 0
Ω)
. Approximate oscillator frequency is defined by:
1
f
=
C
T
(
0.7R
T
+
3R
D
)
Note 7: DC transconductance (g
M
) relates to DC open-loop voltage gain (A
V
) according to the following equation: A
V
= g
M
R
L
where R
L
is the resistance from pin 9 to ground
.
.
The minimum g
M
specification is used to calculate minimum A
V
when the error amplifier output is loaded.
3
UC1525A/27A
UC2525A/27A
UC3525A/27A
ELECTRICAL CHARACTERISTICS:
+V
IN
= 20V, and over operating temperature, unless otherwise specified, T
A
= T
J
PARAMETER
PWM Comparator
Minimum Duty-Cycle
Maximum Duty-Cycle
Input Threshold (Note 6)
Input Bias Current (Note 5)
Shutdown Section
Soft Start Current
Soft Start Low Level
Shutdown Threshold
Shutdown Input Current
Shutdown Delay (Note 5)
Output Low Level
Output High Level
Under-Voltage Lockout
V
C
OFF Current (Note 7)
Rise Time (Note 5)
Fall Time (Note 5)
Total Standby Current
Supply Current
V
IN
= 35V
14
20
14
20
mA
V
SD
= 0V, V
SS
= 0V
V
SD
= 2.5V
To outputs, V
SS
= 5.1V, T
J
= 25°C
V
SD
= 2.5V
V
SD
= 2.5V, T
J
= 25°C
I
SINK
= 20mA
I
SINK
= 100mA
I
SOURCE
= 20mA
I
SOURCE
= 100mA
V
COMP
and V
SS
= High
V
C
= 35V
C
L
= 1nF, T
J
= 25°C
C
L
= 1nF, T
J
= 25°C
100
50
18
17
6
0.6
25
50
0.4
0.8
0.4
0.2
0.2
1.0
19
18
7
8
200
600
300
100
50
80
0.7
1.0
1.0
0.5
0.4
2.0
18
17
6
0.6
25
50
0.4
0.8
0.4
0.2
0.2
1.0
19
18
7
8
200
600
300
80
0.7
1.0
1.0
0.5
0.4
2.0
µA
V
V
mA
µs
V
V
V
V
V
µA
ns
ns
Zero Duty-Cycle
Maximum Duty-Cycle
45
0.7
49
0.9
3.3
.05
3.6
1.0
0
45
0.7
49
0.9
3.3
.05
3.6
1.0
0
%
%
V
V
µA
TEST CONDITIONS
UC1525A/UC2525A
UC1527A/UC2527A
MIN
TYP
MAX
MIN
UC3525A
UC3527A
TYP
MAX
UNITS
Output Drivers
(Each Output) (V
C
= 20V)
Note 5: These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.
Note 6: Tested at f
OSC
= 40kHz (R
T
= 3.6k
Ω
, C
T
= 0.01
µ
F, R
D
= 0
Ω).
Note 7: Collector off-state quiescent current measured at pin 13 with outputs low for UC1525A and high for UC1527A.
4
UC1525A/27A
UC2525A/27A
UC3525A/27A
PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS
UC1525A Output Circuit
(1/2 Circuit Shown)
UC1525A Output Saturation Characteristics
For single-ended supplies, the driver outputs are
grounded. The V
C
terminal is switched to ground by the
totem-pole source transistors on alternate oscillator cy-
cles.
In conventional push-pull bipolar designs, forward base
drive is controlled by R1-R3. Rapid turn-off times for the
power devices are achieved with speed-up capacitors
C1 and C2.
The low source impedance of the output drivers provides
rapid charging of power FET Input capacitance while
minimizing external components.
Low power transformers can be driven by the UC1525A.
Automatic reset occurs during dead time, when both
ends of the primary winding are switched to ground.
5
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