EEWORLDEEWORLDEEWORLD

Part Number

Search

50006-5074G

Description
Board Connector, 222 Contact(s), 3 Row(s), Male, Straight, Press Fit Terminal
CategoryThe connector    The connector   
File Size937KB,16 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Download Datasheet Parametric View All

50006-5074G Overview

Board Connector, 222 Contact(s), 3 Row(s), Male, Straight, Press Fit Terminal

50006-5074G Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAmphenol
Reach Compliance Codecompliant
ECCN codeEAR99
Connector typeBOARD CONNECTOR
Contact to complete cooperationGOLD FLASH (30) OVER PALLADIUM NICKEL
Contact completed and terminatedGOLD FLASH (30) OVER PALLADIUM NICKEL
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee4
MIL complianceNO
Manufacturer's serial number50006
Mixed contactsNO
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded3
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typePRESS FIT
Total number of contacts222
UL Flammability Code94V-0
Base Number Matches1
PDM: Rev:P
STATUS:
Released
Printed: Jul 02, 2011
.
Altera Reference Design-CORDIC Reference Design
IntroductionThe co-ordinate rotation digital computer (CORDIC) reference design implements the CORDIC algorithm, which converts cartesian to polar coordinates and vice versa and also allows vectors to...
xiaoxin1 FPGA/CPLD
[Xiao Meige SOPC Learning Notes] Altera SOPC Embedded System Design Tutorial
[i=s]This post was last edited by Xinhangxian Paotang on 2017-4-12 11:01[/i] [align=center][color=#000][size=15px][size=5][b]Altera SOPC Embedded System Design Tutorial[/b][b]Chapter 1 Overview[/b][/s...
芯航线跑堂 FPGA/CPLD
EEWORLD University ---- MSP430 instruction system
MSP430 instruction system : https://training.eeworld.com.cn/course/349...
dongcuipin MCU
Design of HDB3 Codec Based on FPGA
1 Encoder Design Since VHDL cannot handle negative levels and can only face the two states of "1" and "0", its output needs to be encoded, as shown in Table 1. The encoding is implemented by encoding ...
led123 FPGA/CPLD
CD4046 locks the power grid 50hz phase-locked loop circuit
I use CD4046 and CD4040 (256 frequency division) to phase lock the grid frequency of 50Hz, but I can't adjust it. I don't know the following frequencies: f0: center frequency = 50Hz*256=12.8kHz? ? 2fc...
yilaozhuang Analog electronics
How to get the mouse position parameters?
Hello everyone, I would like to ask which function can be used to obtain the coordinate position of the mouse? It would be best if you can give a concise example. I hope you can give me some advice....
haxinglong Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2218  1558  573  1611  544  45  32  12  33  11 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号