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5962D9960701T9A

Description
Standard SRAM, 512KX8, 25ns, CMOS, DIE-52
Categorystorage    storage   
File Size252KB,45 Pages
ManufacturerCobham PLC
Download Datasheet Parametric View All

5962D9960701T9A Overview

Standard SRAM, 512KX8, 25ns, CMOS, DIE-52

5962D9960701T9A Parametric

Parameter NameAttribute value
MakerCobham PLC
package instructionDIE, DIE OR CHIP
Reach Compliance Codeunknown
Is SamacsysN
Maximum access time25 ns
I/O typeCOMMON
JESD-30 codeR-XUUC-N52
JESD-609 codee0
memory density4194304 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of terminals52
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIE
Encapsulate equivalent codeDIE OR CHIP
Package shapeRECTANGULAR
Package formUNCASED CHIP
Parallel/SerialPARALLEL
power supply3.3 V
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class T
Maximum standby current0.002 A
Minimum standby current2 V
Maximum slew rate0.18 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formNO LEAD
Terminal locationUPPER
total dose10k Rad(Si) V
Base Number Matches1
REVISIONS
LTR
A
B
DESCRIPTION
Added Q level parts to drawing. Corrections to paragraph 1.5.
Footnote changes to Table 1, including removal of footnote 8 . - glg
Added case outline X to drawing. Corrected
E1 terminal symbol to
E.
Corrected table 1 footnotes. Corrections to figure 4. Added 10
second data retention table to figure 5. - glg
DATE (YR-MO-DA)
00-03-20
APPROVED
Raymond Monnin
00-05-25
Raymond Monnin
C
D
E
F
Corrections to paragraph 1.5 and addition of footnote. Corrections to
sheet 16, 1 second data retention test table. - glg
Boilerplate update, added appendix B for die. ksr
Corrected CAGE code typo, 67264 changed to 67268. Updated
boilerplate. ksr
Add 02 device representing an extended temperature device.
Corrected (SEP) effective with no latch-up in paragraph 1.5; was 90.5
MeV-cm
2
/mg changed to 80 MeV-cm
2
/mg ksr
Added devices 03 and 04, updated Table I.
ksr
Boilerplate update and part of five year review. tcr
Added devices 05 and 06; added case outline Y, and updated Table I.
Added additional die information to appendix B. Made corrections to
case U dimension table. ksr
00-08-31
01-05-04
02-03-18
02-11-04
Raymond Monnin
Raymond Monnin
Raymond Monnin
Raymond Monnin
G
H
J
02-12-08
07-12-13
09-08-13
Raymond Monnin
Robert M. Heber
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
J
35
J
15
J
36
J
16
J
37
J
17
J
38
J
18
REV
J
39
J
19
J
40
J
20
J
41
J
21
J
1
J
22
J
2
J
23
J
3
J
24
J
4
J
25
J
5
J
26
J
6
J
27
J
7
J
28
J
8
J
29
J
9
J
30
J
10
J
31
J
11
J
32
J
12
J
33
J
13
J
34
J
14
SHEET
PREPARED BY
Gary L. Gross
CHECKED BY
Jeff Bowling
APPROVED BY
Raymond Monnin
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY All
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
DRAWING APPROVAL DATE
99-09-28
REVISION LEVEL
J
MICROCIRCUIT, MEMORY, DIGITAL,
CMOS, 512K x 8-BIT, RADIATION-
HARDENED, LOW VOLTAGE SRAM,
MONOLITHIC SILICON
SIZE
A
SHEET
1 OF
41
5962-E500-08
CAGE CODE
67268
5962-99607
DSCC FORM 2233
APR 97
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