INTEGRATED CIRCUITS
74F219A
64-bit TTL bipolar RAM, non-inverting
(3-State)
Product specification
IC15 Data Handbook
1996 Jan 05
Philips
Semiconductors
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, non-inverting (3-State)
74F219A
FEATURES
•
High speed performance
•
Replaces 74F219
•
Address access time: 8ns max vs 28ns for 74F219
•
Power dissipation: 4.3mW/bit typ
•
Schottky clamp TTL
•
One chip enable
•
Non–Inverting outputs (for inverting outputs see 74F189A)
•
3–state outputs
•
74F219A in 150 mil wide SO is preferred options for new designs
•
C3F219A in 300 mil wide SOL replaces 74F219 in existing
designs
APPLICATIONS
•
Scratch pad memory
•
Buffer memory
•
Push down stacks
•
Control store
PIN CONFIGURATION
A0 1
CE 2
WE 3
D0 4
Q0 5
D1 6
16 V
CC
15 A1
14 A2
13 A3
12 D3
11 Q3
10 D2
9
Q2
DESCRIPTION
The 74F219A is a high speed, 64–bit RAM organized as a 16–word
by 4–bit array. Address inputs are buffered to minimize loading and
are fully decoded on chip. The outputs are in high impedance state
whenever the chip enable (CE) is high. The outputs are active only
in the READ mode (WE = high) and the output data is the
complement of the stored data.
Q1 7
GND 8
SF00307
TYPE
74F219A
TYPICAL ACCESS TIME
5.0ns
TYPICAL SUPPLY CURRENT(TOTAL)
55mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
16-pin plastic Dual In-line Package
16-pin plastic Small Outline (150mil)
16-pin plastic Small Outline Large (300mil)
COMMERCIAL RANGE
V
CC
= 5V
±
10%, T
amb
= 0
°
C to +70
°
C
N74F219AN
N74F219AD
C3F219AD
DRAWING NUMBER
SOT38-4
SOT109-1
SOT162–1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
D0 – D3
A0 – A3
CE
WE
Q0 – Q3
Data inputs
Address inputs
Chip enable input (active low)
Write enable input (active low)
Data outputs
DESCRIPTION
74F (U.L.)
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/2.0
1.0/2.0
150/40
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/1.2mA
20µA/1.2mA
3mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
1996 Jan 05
2
853-1308 16196
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, non-inverting (3-State)
74F219A
LOGIC SYMBOL
4
6 10 12
IEC/IEEE SYMBOL
1
15
14
13
2
3
1
G1
1 EN [READ]
1 C2 [WRITE]
A,2D
A
5
7
9
11
RAM 16X4
0
A
0
15
D0 D1 D2 D3
1
15
14
13
2
3
A0
A1
A2
A3
CE
WE
Q0 Q1 Q2 Q3
4
6
10
V
CC
= pin 16
GND = pin 8
5
7
9
11
12
SF00308
SF00301
LOGIC DIAGRAM
D0 D1 D2 D3
4
6
10 12
3
Data buffers
2
WE
CE
A0
A1
A2
A3
1
15
14
13
Decoder
Drivers
Address
Decoder
16–word x 4–bit
memory cell
array
Output buffers
5
V
CC
= Pin 16
GND = Pin 8
7
9
11
Q0 Q1 Q2 Q3
SF00309
FUNCTION TABLE
INPUTS
CE
L
L
L
H
WE
H
L
L
X
Dn
X
L
H
X
OUTPUT
Q
n
Stored data
High impedance
High impedance
High impedance
OPERATING
MODE
Read
Write “0”
Write “1”
Disable input
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
1996 Jan 05
3
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, non-inverting (3-State)
74F219A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in high output state
Current applied to output in low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
48
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
T
amb
Supply voltage
High–level input voltage
Low–level input voltage
Input clamp current
High–level output current
Low–level output current
Operating free-air temperature range
0
PARAMETER
LIMITS
MIN
4.5
2.0
0.8
–18
–3
24
+70
NOM
5.0
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
V
OH
High-level output voltage
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
V
OL
Low-level output voltage
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
IK
I
I
I
IH
I
IL
Input clamp voltage
Input current at maximum input voltage
High–level input current
Low–level input current
Offset output current,
high–level voltage applied
Offset output current,
low–level voltage applied
Short-circuit output current
3
Supply current (total)
Input capacitance
others
CE, WE
I
OZH
I
OZL
I
OS
I
CC
C
IN
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX, CE = WE = GND
V
CC
= 5V, V
IN
= 2.0V
-60
55
4
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
LIMITS
TYP
2
MAX
V
3.4
0.35
0.35
-0.73
0.50
0.50
-1.2
100
20
-0.6
-1.2
50
–50
-150
80
V
V
V
V
µA
µA
mA
mA
µA
µA
mA
mA
pF
UNIT
±
10%V
CC
±
5%V
CC
±
10%V
CC
±
5%V
CC
2.4
2.7
C
OUT
Output capacitance
V
CC
= 5V, V
OUT
= 2.0V
7
pF
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
1996 Jan 05
4
Philips Semiconductors
Product specification
64-bit TTL bipolar RAM, non-inverting (3-State)
74F219A
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Disable time
CE to Qn
Write recovery time
Disable time
WE to Qn
Enable time
WE to Qn
Access time
Propagation delay
An to Qn
Enable time
CE to Qn
Waveform 1
Waveform 2
Waveform 3
Waveform 4
Waveform 4
2.5
2.0
1.5
2.5
2.5
1.5
2.0
3.0
3.0
1.5
TYP
5.0
4.5
3.0
4.0
4.5
3.0
3.5
4.5
5.0
3.5
MAX
8.0
8.0
6.0
7.0
7.0
5.5
6.5
7.5
8.0
6.0
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
2.5
2.0
1.5
2.0
2.0
1.0
1.5
2.5
2.5
1.5
MAX
8.0
8.0
7.0
7.5
8.0
6.0
7.0
8.0
9.0
7.0
ns
ns
ns
ns
ns
UNIT
AC SETUP REQUIREMENT
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500Ω
MIN
t
su
(H)
t
su
(L)
t
h
(H)
t
h
(L)
t
su
(H)
t
su
(L)
t
h
(H)
t
h
(L)
t
su
(L)
t
h
(L)
t
w
(L)
Setup time, high or low
An to WE
Hold time, high or low
An to WE
Setup time, high or low
Dn to WE
Hold time, high or low
Dn to WE
Setup time, low
CE (falling edge) to WE (falling edge)
Hold time, low
WE (falling edge) to WE (rising edge)
Pulse width, low
WE
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 4
4.5
4.5
0
0
8.0
7.5
0
0
0
6.5
7.0
TYP
MAX
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
5.0
5.0
0
0
9.0
8.5
0
0
0
7.5
8.0
MAX
ns
ns
ns
ns
ns
ns
ns
UNIT
1996 Jan 05
5
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