INTEGRATED CIRCUITS
74F862, 74F863
Bus transceivers (3-State)
Product specification
Supersedes data of 1999 Jan 08
IC15 Data Handbook
2000 Mar 24
Philips
Semiconductors
Philips Semiconductors
Product specification
Bus transceivers (3-State)
74F862, 74F863
FEATURES
•
Provide high performance bus interface buffering for wide
data/address paths or buses carrying parity
ORDERING INFORMATION
PACKAGES
24-pin Plastic Slim
Dual In-line (300mil)
Package
24-pin Plastic Small
Outline Large
1
COMMERCIAL RANGE
V
CC
= 5V±10%;
T
a
= 0°C to +70°C
N74F862N, N74F863N
PKG DWG #
•
High impedance NPN base inputs for reduced loading (20µA in
High and Low states)
•
I
IL
is 20µA vs. 1000µA for AM29861 series
•
Buffered control inputs for light loading, or increased fan-in as
required with MOS microprocessors
SOT222-1
N74F862D, N74F863D
SOT137-1
•
Positive and negative over-shoots are clamped to ground
•
3-State outputs glitch free during power-up and power-down
•
Slim dual In-line (DIP) 300mil package
•
Broadside pinout compatible with AMD AM29862–29863
•
Outputs sink 64mA
DESCRIPTION
The 74F862 and 74F863 bus transceivers provide high performance
bus interface buffering for wide data/address paths of buses carrying
parity. The 74F863 9-bit bus transceiver has NOR-ed transmit and
receive output enables for maximum control flexibility.
TYPICAL
PROPAGATION
DELAY
6.0ns
6.0ns
TYPICAL SUPPLY
CURRENT
(TOTAL)
150mA
115mA
NOTE:
1. Thermal mounting techniques are recommended. See SMD
Process Applications for a discussion of thermal considerations for
surface mounted devices.
PIN CONFIGURATION
OEBA
A
0
A
1
A
2
A
3
A
4
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
OEAB
TYPE
74F862
74F863
A
5
A
6
A
7
A
8
A
9
GND
TOP VIEW
SF00518
2000 Mar 24
2
853-0881 23378
Philips Semiconductors
Product specification
Bus transceivers (3-State)
74F862, 74F863
PIN CONFIGURATION
74F862
OEBA
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
GND
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
OEAB
PIN CONFIGURATION
74F863
OEBA
0
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
OEBA
1
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
OEAB
0
OEAB
1
SF00521
TOP VIEW
SF01441
LOGIC SYMBOL
74F862
2 3 4
5 6 7
8 9 10 11
LOGIC SYMBOL
74F863
2 3 4
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
1
11
14
13
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
5 6 7
8 9 10
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
OEBA
0
OEBA
1
OEAB
0
OEAB
1
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
13
1
OEAB
OEBA
23 22 21 20 19 18 17 16 15 14
23 22 21 20 19 18 17 16 15
V
CC
= Pin 24
GND = Pin 12
V
CC
= Pin 24
GND = Pin 12
SF00522
SF00525
LOGIC SYMBOL (IEEE/IEC)
74F862
1
13
EN1(BA)
EN2(AB)
23
2
∆
LOGIC SYMBOL (IEEE/IEC)
1
11
14
13
2
74F863
&
&
EN1(BA)
EN2(AB)
23
2
∆
22
21
20
19
18
17
16
15
14
3
4
5
6
7
8
9
10
11
22
21
20
19
18
17
3
4
5
6
7
8
16
15
14
9
10
11
SF00523
2000 Mar 24
3
∆
1
∆
∆
∆
1
∆
∆
2
SF00526
Philips Semiconductors
Product specification
Bus transceivers (3-State)
74F862, 74F863
LOGIC DIAGRAM
74F862
OEAB
LOGIC DIAGRAM
74F863
OEAB
0
OEAB
1
10
A
n
10
B
n
A
n
9
9
B
n
OEBA
0
OEBA
SF00531
OEBA
1
SF00532
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
A
0
– A
9
B
0
– B
9
74F862
OEBA
OEAB
A
0
– A
9
B
0
– B
9
A
0
– A
9
B
0
– B
9
74F863
OEBA
n
OEAB
n
A
0
– A
9
B
0
– B
9
DESCRIPTION
Data transmit inputs
Data receive inputs
Transmit output enable input
Receive output enable input
Data transmit outputs
Data receive outputs
Data transmit inputs
Data receive inputs
Transmit output enable input
Receive output enable input
Data transmit outputs
Data receive outputs
74F(U.L.)
HIGH/LOW
3.5/0.117
3.5/0.117
1.0/0.033
1.0/0.033
1200/106.7
1200/106.7
3.5/0.117
3.5/0.117
1.0/0.033
1.0/0.033
1200/106.7
1200/106.7
LOAD VALUE
HIGH/LOW
70µA/70µA
70µA/70µA
20µA/20µA
20µA/20µA
24mA/64mA
24mA/64mA
70µA/70µA
70µA/70µA
20µA/20µA
20µA/20µA
24mA/64mA
24mA/64mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
FUNCTION TABLE FOR 74F862
INPUTS
OEAB
L
H
H
H = High voltage level
L = Low voltage level
Z = High impedance “off” state
OEBA
H
L
H
OPERATING MODES
74F862
A data to B bus
B bus to A data
Z
FUNCTION TABLE FOR 74F863
INPUTS
OEAB
0
L
L0
H
X
H
OEAB
1
L
L
X
H
H
OEBA
0
H
X
L
L
H
OEBA
1
X
H
L
L
H
OPERATING MODES
74F863
A data to B bus
B bus to A data
Z
H = High voltage level
L = Low voltage level
Z = High impedance “off” state
2000 Mar 24
4
Philips Semiconductors
Product specification
Bus transceivers (3-State)
74F862, 74F863
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted, these limits are over the operating free-air temperature range.
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
a
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to +5.5
128
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
MIN
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
a
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
4.5
2.0
0.8
–18
–24
64
70
LIMITS
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
2000 Mar 24
5
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