74F366•74F368 Hex Inverter Buffer with 3-STATE Outputs
April 1988
Revised August 1999
74F366•74F368
Hex Inverter Buffer with 3-STATE Outputs
Features
s
3-STATE buffer outputs sink 64 mA
s
High-speed
s
Bus-oriented
s
High impedance npn base inputs for reduced loading
Ordering Code:
Order Number
74F366SC
74F366PC
74F368SC
74F368SJ
74F368PC
Package Number
M16A
N16E
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F366
74F368
© 1999 Fairchild Semiconductor Corporation
DS009521
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74F366•74F368
Logic Symbols
IEEE/IEC
74F366
IEEE/IEC
74F368
Unit Loading/Fan Out
Pin Names
OE
1
, OE
2
I
n
O
n
, O
n
Description
Output Enable Input (Active LOW)
Input
Outputs
U.L.
HIGH/LOW
1.0/0.033
1.0/0.033
600/106.6 (80)
Input I
IH
/I
IL
Output I
OH
/I
OL
20
µA/−20 µA
20
µA/−20 µA
−12
mA/64 mA (48 mA)
Function Tables
74F366
Inputs
OE
1
L
L
X
H
OE
2
L
L
H
X
I
L
H
X
X
Output
O
H
L
Z
Z
L
=
LOW Voltage Level
H
X
=
Immaterial
Z
=
High Impedance
74F368
Inputs
OE
L
L
H
I
L
H
X
Output
O
H
L
Z
=
HIGH Voltage Level
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2
74F366•74F368
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−0.5V
to V
CC
−0.5V
to
+5.5V
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to
+70°C
+4.5V
to
+5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
I
BVI
I
IL
I
OZH
I
OZL
I
OS
I
CEX
I
ZZ
I
CCH
I
CCL
I
CCZ
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH Current
Input HIGH Current
Breakdown Test
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
20
49
35
−100
−20
50
−50
−225
250
500
25
62
48
µA
µA
µA
mA
µA
µA
mA
mA
mA
Max
Max
Max
Max
Max
0.0V
Max
Max
Max
V
IN
=
0.5V
V
OUT
=
2.7V
V
OUT
=
0.5V
V
OUT
=
0V
V
OUT
=
V
CC
V
OUT
=
5.25V
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
20
100
µA
µA
Max
Max
V
IN
=
2.7V
V
IN
=
7.0V
10% V
CC
0.55
V
Min
I
OL
=
64 mA
10% V
CC
2.0
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
V
Min
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −15
mA
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PZH
t
PZL
t
PZH
t
PZL
t
PHZ
t
PLZ
Disable Time
Enable Time (74F368)
Enable Time (74F366)
Propagation Delay
2.5
1.0
2.5
2.5
2.5
3.0
2.0
2.0
V
CC
= +5.0V
C
L
=
50 pF
Typ
4.0
1.8
4.2
4.2
4.2
5.6
3.3
4.1
Max
6.5
5.0
9.5
9.0
7.5
8.5
6.5
6.5
T
A
=
0°C to
+70°C
C
L
=
50 pF
C
L
=
50 pF
Min
2.0
1.0
2.5
2.5
2.0
3.0
2.0
2.0
Max
7.5
5.5
10.0
9.5
8.5
9.0
7.0
7.0
ns
ns
ns
ns
Units
3
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74F366•74F368
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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4
74F366•74F368 Hex Inverter Buffer with 3-STATE Outputs
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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