AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Introduction
The AGR09030E is a high-voltage, gold-metalized,
laterally diffused metal oxide semiconductor
(LDMOS) RF power transistor suitable for cellular
band, code-division multiple access (CDMA), global
system for mobile communication (GSM), enhanced
data for global evolution (EDGE), and time-division
multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications. This
device is manufactured on an advanced LDMOS
technology, offering state-of-the-art performance,
reliability, and thermal resistance. Packaged in an
industry-standard CuW package capable of deliver-
ing a minimum output power of 30 W, it is ideally
suited for today's RF power amplifier applications.
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
AGR09030EU
AGR09030EF
Sym
R
R
JC
JC
Value
1.85
2.2
Unit
°C/W
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Total Dissipation at T
C
= 25 °C:
AGR09030EU
AGR09030EF
Derate Above 25
°C:
AGR09030EU
AGR09030EF
Operating Junction Tempera-
ture
Storage Temperature Range
Sym Value
V
DSS
65
V
GS
–0.5, +15
I
D
4.25
P
D
P
D
—
—
T
J
95
80
0.54
0.45
200
Unit
Vdc
Vdc
Adc
W
W
W/°C
W/°C
°C
AGR09030EU (unflanged)
AGR09030EF (flanged)
Figure 1. Available Packages
T
STG
–65, +150 °C
Features
Typical performance ratings are for IS-95 CDMA,
pilot, sync, paging, traffic codes 8—13:
— Output power (P
OUT
): 7 W.
— Power gain: 21 dB.
— Efficiency: 27%.
— Adjacent channel power ratio (ACPR) for
30 kHz bandwidth (BW):
(750 kHz offset: –45 dBc)
(1.98 MHz offset: –60 dBc).
— Input return loss: 10 dB.
High-reliability, gold-metalization process.
High gain, efficiency, and linearity.
Integrated ESD protection.
Si LDMOS.
Industry-standard packages.
30 W minimum output power.
* Stresses in excess of the absolute maximum ratings can cause
permanent damage to the device. These are absolute stress rat-
ings only. Functional operation of the device is not implied at
these or any other conditions in excess of those given in the
operational sections of the data sheet. Exposure to absolute
maximum ratings for extended periods can adversely affect
device reliability.
Table 3. ESD Rating*
AGR09030E
HBM
MM
CDM
Minimum (V)
500
50
1500
Class
1B
A
4
* Although electrostatic discharge (ESD) protection circuitry has
been designed into this device, proper precautions must be
taken to avoid exposure to ESD and electrical overstress (EOS)
during all handling, assembly, and test operations.
PEAK Devices
Agere
employs a human-body model (HBM), a machine model (MM),
and a charged-device model (CDM) qualification requirement in
order to determine ESD-susceptibility limits and protection
design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used in each of the models, as defined by
JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and
JESD22-C101A (CDM) standards.
Caution: MOS devices are susceptible to damage from elec-
trostatic charge. Reasonable precautions in han-
dling and packaging MOS devices should be
observed.
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Electrical Characteristics
Recommended operating conditions apply unless otherwise specified: T
C
= 30 °C.
Table 4. dc Characteristics
Parameter
Off Characteristics
150
Drain-source Breakdown Voltage (V
GS
= 0, I
D
= 100 µA)
Gate-source Leakage Current (V
GS
= 5 V, V
DS
= 0 V)
Zero Gate Voltage Drain Leakage Current (V
DS
= 28 V, V
GS
= 0 V)
On Characteristics
Forward Transconductance (V
DS
= 10 V, I
D
= 1.0 A)
Gate Threshold Voltage (V
DS
= 10 V, I
D
= 400 µA)
Gate Quiescent Voltage (V
DS
= 28 V, I
DQ
= 330 mA)
Drain-source On-voltage (V
GS
= 10 V, I
D
= 1.0 A)
Table 5. RF Characteristics
Parameter
Dynamic Characteristics
Input Capacitance
(V
DS
= 28 Vdc, V
GS
= 0, f = 1 MHz)
Output Capacitance
(V
DS
= 28 Vdc, V
GS
= 0, f = 1 MHz)
Reverse Transfer Capacitance
(V
DS
= 28 Vdc, V
GS
= 0, f = 1 MHz)
C
ISS
C
OSS
C
RSS
—
—
—
56
15.7
0.73
—
—
—
pF
pF
pF
Symbol
Min
Typ
Max
Unit
G
FS
V
GS(TH)
V
GS(Q)
V
DS(ON)
—
—
—
—
2.2
—
3.8
0.35
—
5.0
—
—
S
Vdc
Vdc
Vdc
Symbol
V
(BR)DSS
I
GSS
I
DSS
Min
65
—
—
Typ
—
—
—
Max
—
0.95
50
2.9
Unit
Vdc
µAdc
µAdc
Functional Tests
(in Supplied Test Fixture)
Agere Systems Supplied Test Fixture)
(Test frequencies (f) = 865 MHz, 880 MHz, 895 MHz)
Linear Power Gain
(V
DS
= 28 V, P
OUT
= 5 W, I
DQ
= 330 mA)
Output Power
(V
DS
= 28 V, 1 dB compression, I
DQ
= 330 mA)
Drain Efficiency
(V
DS
= 28 V, P
OUT
= P1dB, I
DQ
= 330 mA)
Third-order Intermodulation Distortion
(100 kHz spacing, V
DS
= 28 V, P
OUT
= 30 WPEP, I
DQ
= 330 mA)
Input Return Loss
Ruggedness
(V
DS
= 28 V, P
OUT
= 30 W, I
DQ
= 330 mA, f = 880 MHz,
VSWR = 10:1, all angles)
IMD
I
RL
—
G
L
P1dB
19
30
—
—
—
21
40
57
–31
10
—
—
—
—
—
dB
W
%
dBc
dB
No degradation in output power.
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Test Circuit Illustrations for AGR09030E
V
GG
+
C26
C14
R3
+
R2
C13
C12
C11
C10
C9
C8
Z11
Z16
Z1
RF INPUT
C27
Z2
Z3
C1
Z4
Z5
Z6
Z7
R1
Z15
C2
C3
Z19
C17
Z12
Z8
Z9
Z10
2
1
DUT
3
C4
C6
C5
C7
PINS:
1. DRAIN
2. GATE
3. SOURCE
Z13
C16
Z17
C18
Z18
RF OUTPUT
Z14
FB1
+
C19
C20
C21
C22
C23
C24
C25
V
DD
A. Schematic
Parts List:
Microstrip line: Z1 0.900 in. x 0.066 in.; Z2 0.294 in. x 0.050 in.; Z3 0.123 in. x 0.066 in.; Z4 0.703 in. x 0.066 in.; Z5 0.267 in. x 0.150 in.;
Z6 0.270 in. x 0.150 in.; Z7 0.050 in. x 0.440 in.; Z8 0.324 in. x 0.440 in.; Z9 0.100 in. x 0.440 in.; Z10 0.155 in. x 0.440 in.;
Z11 1.024 in. x 0.050 in.; Z12 0.123 in. x 0.300 in.; Z13 0.050 in. x 0.300 in.; Z14 0.213 in. x 0.300 in.; Z15 0.393 in. x 0.100 in.;
Z16 0.194 in. x 0.100 in.; Z17 0.523 in. x 0.066 in.; Z18 1.085 in. x 0.066 in.; Z19 2.048 x 0.050.
ATC
®
chip capacitor: C1, C8, C18, C19: 47 pF, 100B470JW; C27: 8.2 pF, 100A8R2BW; C4, C5, C6, C7: 12 pF, 100B120JW;
C3: 1.0 pF, 100B1R0BW; C9, C16, C20: 10 pF, 100B100JW; C2, C17: 8.2 pF, 100B8R2BW.
Murata
®
chip capacitor: C12, C23: 0.01 µF GRM40X7R103K100AL.
0603 chip capacitor: C10, C21: 220 pF.
Sprague
®
tantalum chip capacitor: C14, C25, C26: 22 µF, 35 V.
Kreger
®
ferrite bead: FB1: 2743D19447.
Kemet
®
chip capacitor: C13, C24: 0.10 µF C1206C104KRAC7800.
Vitramon
®
chip capacitor: C11, C22: 2200 pF, VJ1206Y222KXA.
1206 size 0.25 W, fixed film, chip resistors: R1: 51 , RM73B2B510J; R2: 47 k , RM73B2B473J; R3: 1 k , RM73B2B102J.
Taconic
®
ORCER RF-35: board material, 1 oz. copper, 30 mil thickness, r = 3.5.
B. Component Layout
Figure 2. AGR09030E Test Circuit
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics
0.11
0. 1
0. 4
0.12
0.38
0.13
0.37
0.14
0.36
0. 15
0. 35
0. 9
0. 6
60
2
0. 4
0
12
0. 7
7
0. 0
65
0. 5
3
0. 4
0
13
0.
06
0.
44
70
0. 0
5
0. 4
5
75
EN
T
(+
jX
/
Z
,
o)
14
0
O
R
P
CA
AC
IT
U
ES
IV
SC
E
A
PT
NC
jB
E
(+
)
/
Yo
0.2
0. 4
0. 0
4
0. 4
6
15
0
EC
OM
PO
N
0. 6
R—
>
80
TO
TA
NC
0. 8
ERA
0. 47
RE
AC
1. 0
GEN
160
85
ARD
UCT
TOW
0.48
IN
D
GTH
S
170
0.0
—>
W
A
V
E
L
E
N
0. 49
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.6
1.8
±
180
Z
0
= 8
0.0
L
O
A
D
<—
WARD
R E SIST A N C E C OM PON E N T (R / Z o), OR C ON D U C T A N C E C OM PON E N T (G / Y o)
0.2
0. 49
-170
0.1
-90
0. 4
TO
TH
S
0.48
EN
G
/Y
(
-jB
o)
0. 6
V
EL
WA
-160
8
0.
-85
AN
. 47
PT
MHz (f)
865 (f1)
880 (f2)
895 (f3)
Z
L
Z
S
(Complex
Source Impedance) (Complex Optimum Load Impedance)
0.618 + j0.290
3.26 + j2.10
0.711 + j0.364
3.39 + j2.47
0.788 + j0.380
3.55 + j2.83
DRAIN (1)
Z
L
SOURCE (3)
GATE (2)
Z
S
INPUT MATCH
DUT
OUTPUT MATCH
Figure 3. Series Equivalent Input and Output Impedances
1. 0
0. 2
CE
2.0
0
0.2
f1
Z
S
f3
0. 6
f1
0. 4
0.1
90
0.
8
Z
L
IV
E
f3
1. 0
1. 4
8
0. 0
0.8
1.2
55
9
0. 0
1
0. 4
0.39
100
90
50
80
40
45
1.0
110
70
35
0.
4
0. 3
0. 2
AGR09030E
30 W, 865 MHz—895 MHz, N-Channel E-Mode, Lateral MOSFET
Typical Performance Characteristics
(continued)
0
-10
-20
ACPR (dBc)X
-30
-40
-50
-60
-70
-80
0
5
FREQUENCY = 880 MHz
ACP+
ACP-
ACP1+
ACP1-
10
P
OUT
(W)X
15
20
TEST CONDITIONS:
V
DD
= 28 Vdc, I
DQ
= 0.33 A, T
C
= 30 °C.
IS-95 CDMA PILOT, PAGING, SYNC, TRAFFIC CODES 8—13. OFFSET 1 = 750 kHz, 30 kHz BW. OFFSET 2 = 1.98 MHz, 30 kHz BW.
Figure 4. ACPR vs. P
OUT
23
22
21
20
POWER GAIN (dB)X
0.0
POWER GAIN
P
OUT
= 5 W
-2.0
-4.0
P
OUT
= 40 W
-6.0
-8.0
-10.0
RETURN LOSS
-12.0
-14.0
-16.0
-18.0
900
INPUT RETURN LOSS (dB)X
19
18
17
16
15
14
13
12
11
10
860
865
870
875
880
885
FREQUENCY (MHz)X
890
895
TEST CONDITIONS:
V
DD
= 28 Vdc, I
DQ
= 0.33 A, T
C
= 30 °C, WAVEFORM = CW.
Figure 5. Power Gain and Return Loss vs. Frequency
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