TTLDFMM-50 datasheet, PDF - EEWORLD Datasheet

TTLDFMM-50: DescriptionClock Generator, 50MHz, MOS, PDIP4, 0.250 INCH HEIGHT, PLASTIC, MODULE, DIP-14/4; CategoryThe embedded processor and controller Microcontrollers and processors; File Size274KB，2 Pages; ManufacturerEngineered Components Co.

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TTLDFMM-50 Overview

Clock Generator, 50MHz, MOS, PDIP4, 0.250 INCH HEIGHT, PLASTIC, MODULE, DIP-14/4

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	0.250 INCH HEIGHT, PLASTIC, MODULE, DIP-14/4
Contacts	14/4
Reach Compliance Code	unknown
ECCN code	EAR99
Is Samacsys	N
JESD-30 code	R-PDIP-T4
length	20.32 mm
Number of terminals	4
Maximum operating temperature	70 °C
Minimum operating temperature
Maximum output clock frequency	50 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Master clock/crystal nominal frequency	10 MHz
Certification status	Not Qualified
Maximum seat height	6.35 mm
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	MOS
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	7.62 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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