DM74LS83A 4-Bit Binary Adder with Fast Carry
August 1986
Revised March 2000
DM74LS83A
4-Bit Binary Adder with Fast Carry
General Description
These full adders perform the addition of two 4-bit binary
numbers. The sum (∑) outputs are provided for each bit
and the resultant carry (C4) is obtained from the fourth bit.
These adders feature full internal look ahead across all four
bits. This provides the system designer with partial look-
ahead performance at the economy and reduced package
count of a ripple-carry implementation.
The adder logic, including the carry, is implemented in its
true form meaning that the end-around carry can be
accomplished without the need for logic or level inversion.
Features
s
Full-carry look-ahead across the four bits
s
Systems achieve partial look-ahead performance with
the economy of ripple carry
s
Typical add times
Two 8-bit words 25 ns
Two 16-bit words 45 ns
s
Typical power dissipation per 4-bit adder 95 mW
Ordering Code:
Order Number
DM74LS83AN
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagram
© 2000 Fairchild Semiconductor Corporation
DS006378
www.fairchildsemi.com
DM74LS83A
Truth Table
H
=
HIGH Level, L
=
LOW Level
Input conditions at A1, B1, A2, B2, and C0 are used to determine outputs
∑1
and
∑2
and the value of the internal carry C2. The values at C2, A3, B3, A4, and
B4 are then used to determine outputs
∑3, ∑4,
and C4.
Logic Diagram
www.fairchildsemi.com
2
DM74LS83A
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Free Air Operating Temperature
0
Parameter
Min
4.75
2
0.8
−0.4
8
70
Nom
5
Max
5.25
Units
V
V
V
mA
mA
°C
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CC1
I
CC2
Input Current @ Max
Input Voltage
HIGH Level
Input Current
LOW Level
Input Current
Short Circuit Output Current
Supply Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max
V
I
=
7V
V
CC
=
Max
V
I
=
2.7V
V
CC
=
Max
V
I
=
0.4V
V
CC
=
Max (Note 3)
V
CC
=
Max (Note 4)
V
CC
=
Max (Note 5)
A or B
C0
A or B
C0
A or B
C0
−20
19
22
2.7
3.4
0.35
0.25
0.5
0.4
0.2
0.1
40
20
−0.8
−0.4
−100
34
39
mA
µA
mA
mA
mA
mA
Min
Typ
(Note 2)
Max
−1.5
Units
V
V
V
Note 2:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 3:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 4:
I
CC1
is measured with all outputs open, all B inputs LOW and all other inputs at 4.5V, or all inputs at 4.5V.
Note 5:
I
CC2
is measured with all outputs OPEN and all inputs grounded.
3
www.fairchildsemi.com
DM74LS83A
Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
From (Input)
Symbol
Parameter
To (Output)
C
L
=
15 pF
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
C0 to
∑1
or
∑2
C0 to
∑1
or
∑2
C0 to
∑3
C0 to
∑3
C0 to
∑4
C0 to
∑4
A
i
, B
i
to
∑
i
A
i
, B
i
to
∑
i
C0 to C4
C0 to C4
A
i
, B
i
to C4
A
i
, B
i
to C4
Max
24
24
24
24
24
24
24
24
17
17
17
17
R
L
=
2 kΩ
C
L
=
50 pF
Min
Max
28
30
28
30
28
30
28
30
24
25
24
26
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
www.fairchildsemi.com
4
DM74LS83A 4-Bit Binary Adder with Fast Carry
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
www.fairchildsemi.com