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MC74HC75D

Description
D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, PLASTIC, SOIC-16
Categorylogic    logic   
File Size172KB,5 Pages
ManufacturerMotorola ( NXP )
Websitehttps://www.nxp.com
Download Datasheet Parametric Compare View All

MC74HC75D Overview

D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, PLASTIC, SOIC-16

MC74HC75D Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionSOP, SOP16,.25
Reach Compliance Codeunknown
seriesHC/UH
JESD-30 codeR-PDSO-G16
JESD-609 codee0
length9.9 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeD LATCH
MaximumI(ol)0.004 A
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP16,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2/6 V
Prop。Delay @ Nom-Sup38 ns
propagation delay (tpd)44 ns
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)6 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Trigger typeHIGH LEVEL
width3.9 mm
Base Number Matches1
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual 2-Bit Transparent Latch
High–Performance Silicon–Gate CMOS
The MC74HC75 is identical in pinout to the LS75. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device consists of two independent 2–bit transparent latches. Each
latch stores the input data while Latch Enable is at a logic low. The outputs
follow the data inputs when Latch Enable is at a logic high.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 80 FETs or 20 Equivalent Gates
16
1
MC74HC75
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC74HCXXN
MC74HCXXD
Plastic
SOIC
PIN ASSIGNMENT
LOGIC DIAGRAM
Q0a
D0a
DATA
INPUTS
D0
D1
2, 6
3, 7
2–BIT
TRANSPARENT
LATCH
16, 10
1, 11
15, 9
14, 8
Q0
Q0
Q1
Q1
D1a
LEb
VCC
D0b
D1b
Q1b
LATCH
ENABLE
13, 4
PIN 5 = VCC
PIN 12 = GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q0a
Q1a
Q1a
LEa
GND
Q0b
Q0b
Q1b
FUNCTION TABLE
Inputs
D
L
H
X
Latch
Enable
H
H
L
Outputs
Q
L
H
Q0
Q
H
L
Q0
X = don’t care
Q0 = latched data
10/95
©
Motorola, Inc. 1995
1
REV 6

MC74HC75D Related Products

MC74HC75D MC74HC75N
Description D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, PLASTIC, SOIC-16 D Latch, HC/UH Series, 2-Func, High Level Triggered, 2-Bit, Complementary Output, CMOS, PDIP16, PLASTIC, DIP-16
Is it Rohs certified? incompatible incompatible
package instruction SOP, SOP16,.25 DIP,
Reach Compliance Code unknown unknown
series HC/UH HC/UH
JESD-30 code R-PDSO-G16 R-PDIP-T16
JESD-609 code e0 e0
length 9.9 mm 19.175 mm
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type D LATCH D LATCH
Number of digits 2 2
Number of functions 2 2
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP DIP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 44 ns 44 ns
Certification status Not Qualified Not Qualified
Maximum seat height 1.75 mm 4.44 mm
Maximum supply voltage (Vsup) 6 V 6 V
Minimum supply voltage (Vsup) 2 V 2 V
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form GULL WING THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
Trigger type HIGH LEVEL HIGH LEVEL
width 3.9 mm 7.62 mm
Base Number Matches 1 1
006
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